From 05c731125c33742d015169dc14be7c7e65212e19 Mon Sep 17 00:00:00 2001 From: Vincent Dupont <vincent@otakeys.com> Date: Thu, 31 Aug 2017 14:14:21 +0200 Subject: [PATCH] cpu/stm32_common: fix extra PLL enabling --- cpu/stm32_common/stmclk.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/cpu/stm32_common/stmclk.c b/cpu/stm32_common/stmclk.c index eeb42969bc..577c24058e 100644 --- a/cpu/stm32_common/stmclk.c +++ b/cpu/stm32_common/stmclk.c @@ -230,13 +230,13 @@ void stmclk_init_sysclk(void) stmclk_disable_hsi(); -#if (CLOCK_ENABLE_PLLI2S) - RCC->PLLI2SCFGR = (PLLI2S_SRC | PLLI2S_M | PLLI2S_N | PLLI2S_P | PLLI2S_Q | PLLI2S_R); +#if (CLOCK_ENABLE_PLL_I2S) + RCC->PLLI2SCFGR = (CLOCK_PLL_I2S_SRC | PLLI2S_M | PLLI2S_N | PLLI2S_P | PLLI2S_Q | PLLI2S_R); RCC->CR |= (RCC_CR_PLLI2SON); while (!(RCC->CR & RCC_CR_PLLI2SRDY)) {} #endif /* CLOCK_ENABLE_PLLI2S */ -#if (CLOCK_ENABLE_PLLSAI) +#if (CLOCK_ENABLE_PLL_SAI) RCC->PLLSAICFGR = (PLLSAI_M | PLLSAI_N | PLLSAI_P | PLLSAI_Q | PLLSAI_R); RCC->CR |= (RCC_CR_PLLSAION); while (!(RCC->CR & RCC_CR_PLLSAIRDY)) {} -- GitLab