From 09e0e8953d6970a5567a50aa4f65261b89881c75 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Joakim=20Nohlg=C3=A5rd?= <joakim.nohlgard@eistec.se>
Date: Wed, 16 May 2018 22:16:34 +0200
Subject: [PATCH] kinetis: GPIO: Enable the correct IRQn on CM0+
---
cpu/kinetis/include/cpu_conf_kinetis.h | 1 +
cpu/kinetis/periph/gpio.c | 7 +++++--
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/cpu/kinetis/include/cpu_conf_kinetis.h b/cpu/kinetis/include/cpu_conf_kinetis.h
index d874f984de..9bb4bb8375 100644
--- a/cpu/kinetis/include/cpu_conf_kinetis.h
+++ b/cpu/kinetis/include/cpu_conf_kinetis.h
@@ -155,6 +155,7 @@ extern "C"
#define LPTMR0_IRQn LPTimer_IRQn
#define PIT_TCTRL_CHN_MASK (0x4u)
#define PIT_TCTRL_CHN_SHIFT (2)
+#define PORT_IRQS { PORTA_IRQn, PORTB_IRQn, PORTC_IRQn, PORTD_IRQn, PORTE_IRQn }
#endif /* MK20D7_H_ */
/** @} */
diff --git a/cpu/kinetis/periph/gpio.c b/cpu/kinetis/periph/gpio.c
index b29c0273e3..ec0155dfdc 100644
--- a/cpu/kinetis/periph/gpio.c
+++ b/cpu/kinetis/periph/gpio.c
@@ -113,6 +113,7 @@ static isr_ctx_t isr_ctx[CTX_NUMOF];
*/
static uint32_t isr_map[ISR_MAP_SIZE];
+static const uint8_t port_irqs[] = PORT_IRQS;
static inline PORT_Type *port(gpio_t pin)
{
@@ -217,9 +218,11 @@ int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
/* clear interrupt flags */
port(pin)->ISFR &= ~(1 << pin_num(pin));
+
/* enable global port interrupts in the NVIC */
- NVIC_EnableIRQ(PORTA_IRQn + port_num(pin));
- /* finally, enable the interrupt for the select pin */
+ NVIC_EnableIRQ(port_irqs[port_num(pin)]);
+
+ /* finally, enable the interrupt for the selected pin */
port(pin)->PCR[pin_num(pin)] |= flank;
return 0;
}
--
GitLab