diff --git a/cpu/stm32f1/cpu.c b/cpu/stm32f1/cpu.c index 1eca9a5ea6284100bf725dc591f628b64e47b7ad..d24aeafa8899dfc7dc8ce8e9872b82da8d35f044 100644 --- a/cpu/stm32f1/cpu.c +++ b/cpu/stm32f1/cpu.c @@ -29,10 +29,8 @@ static void clk_init(void); void cpu_init(void) { - /* set PendSV priority to the lowest possible priority */ - NVIC_SetPriority(PendSV_IRQn, 0xff); - /* configure the vector table location to internal flash */ - SCB->VTOR = FLASH_BASE; + /* initialize the Cortex-M core */ + cortexm_init(); /* initialize system clocks */ clk_init(); } diff --git a/cpu/stm32f1/include/cpu_conf.h b/cpu/stm32f1/include/cpu_conf.h index 37b8eb797e0e57db99e31962db9e649e5e9fd3c2..f6f0d81e689f732bc583a24472c9af4f4b303920 100644 --- a/cpu/stm32f1/include/cpu_conf.h +++ b/cpu/stm32f1/include/cpu_conf.h @@ -30,29 +30,12 @@ extern "C" { #endif /** - * @name Kernel configuration - * - * TODO: measure and adjust for the cortex-m3 - * @{ - */ -#define THREAD_EXTRA_STACKSIZE_PRINTF (1024) - -#ifndef THREAD_STACKSIZE_DEFAULT -#define THREAD_STACKSIZE_DEFAULT (1024) -#endif - -#define THREAD_STACKSIZE_IDLE (256) -/** @} */ - -/** - * @name UART0 buffer size definition for compatibility reasons - * - * TODO: remove once the remodeling of the uart0 driver is done + * @brief ARM Cortex-M specific CPU configuration * @{ */ -#ifndef UART0_BUFSIZE -#define UART0_BUFSIZE (128) -#endif +#define CPU_DEFAULT_IRQ_PRIO (1U) +#define CPU_IRQ_NUMOF (60U) +#define CPU_FLASH_BASE FLASH_BASE /** @} */ /** @@ -60,20 +43,6 @@ extern "C" { */ #define CPUID_ID_LEN (12) -/** - * @brief Definition of different panic modes - */ -typedef enum { - HARD_FAULT, - WATCHDOG, - BUS_FAULT, - USAGE_FAULT, - DUMMY_HANDLER -} panic_t; - -/** - * @brief Buffer size to use by the transceiver - */ #define TRANSCEIVER_BUFFER_SIZE (3) /** diff --git a/cpu/stm32f1/startup.c b/cpu/stm32f1/startup.c index 34582a2308f2fefc263311dcc07144104e8b798a..b5e356e3f93ad39a97af0924499a60c25314835a 100644 --- a/cpu/stm32f1/startup.c +++ b/cpu/stm32f1/startup.c @@ -82,8 +82,7 @@ void reset_handler(void) */ void dummy_handler(void) { - core_panic(DUMMY_HANDLER, "DUMMY HANDLER"); - while (1) {asm ("nop");} + core_panic(PANIC_DUMMY_HANDLER, "DUMMY HANDLER"); } void isr_nmi(void) @@ -103,20 +102,17 @@ void isr_debug_mon(void) void isr_hard_fault(void) { - core_panic(HARD_FAULT, "HARD FAULT"); - while (1) {asm ("nop");} + core_panic(PANIC_HARD_FAULT, "HARD FAULT"); } void isr_bus_fault(void) { - core_panic(BUS_FAULT, "BUS FAULT"); - while (1) {asm ("nop");} + core_panic(PANIC_BUS_FAULT, "BUS FAULT"); } void isr_usage_fault(void) { - core_panic(USAGE_FAULT, "USAGE FAULT"); - while (1) {asm ("nop");} + core_panic(PANIC_USAGE_FAULT, "USAGE FAULT"); } /* Cortex-M specific interrupt vectors */