diff --git a/cpu/lpc2387/include/periph_cpu.h b/cpu/lpc2387/include/periph_cpu.h index 841b63bbf355d4b751f49cdde1845755eb933123..d5a99d5a4ca5fd0fb919151dbccc6a21018824fd 100644 --- a/cpu/lpc2387/include/periph_cpu.h +++ b/cpu/lpc2387/include/periph_cpu.h @@ -39,12 +39,22 @@ extern "C" { * @brief Fast GPIO register definition struct */ typedef struct { - __IO uint32_t DIR; /**< he */ - uint32_t _reserved[3]; /**< really */ - __IO uint32_t MASK; /**< wants */ - __IO uint32_t PIN; /**< to */ - __IO uint32_t SET; /**< know */ - __IO uint32_t CLR; /**< everything */ + /** @brief Direction: Output if corresponding bit is set, otherwise input */ + __IO uint32_t DIR; + /** @brief 12 bytes of reseved memory we don't need to access */ + uint32_t _reserved[3]; + /** @brief Set bits to ignore corresponding bits when accessing `PIN`, `SET` + * or `CLR` register of this port + */ + __IO uint32_t MASK; + /** @brief The current state of each pin of this port is accessible here + * (regardless of direction): If bit is set input is high + */ + __IO uint32_t PIN; + /** @brief Output pins are set to high by setting the corresponding bit */ + __IO uint32_t SET; + /** @brief Output pins are set to low by setting the corresponding bit */ + __IO uint32_t CLR; } FIO_PORT_t; #define FIO_PORTS ((FIO_PORT_t*)FIO_BASE_ADDR) @@ -54,7 +64,7 @@ typedef struct { int gpio_init_mux(unsigned pin, unsigned mux); void gpio_init_states(void); -#define GPIO_PIN(port, pin) (port*32 + pin) +#define GPIO_PIN(port, pin) (port<<5 | pin) #ifndef DOXYGEN #define HAVE_GPIO_FLANK_T diff --git a/cpu/lpc2387/periph/gpio.c b/cpu/lpc2387/periph/gpio.c index a36e28fc5eee4774ecef3b234782c8bb91350b7a..3891c50b7f61de6d9d6dc2c79618318581376232 100644 --- a/cpu/lpc2387/periph/gpio.c +++ b/cpu/lpc2387/periph/gpio.c @@ -67,18 +67,19 @@ int gpio_init(gpio_t pin, gpio_mode_t mode) { unsigned _pin = pin & 31; unsigned port = pin >> 5; - - if (mode != GPIO_OUT) { - return -1; - } - FIO_PORT_t *_port = &FIO_PORTS[port]; - /* set mask */ - _port->MASK = ~(0x1<<_pin); - /* set direction */ - _port->DIR = ~0; + switch (mode){ + case GPIO_OUT: + _port->DIR |= 1<<_pin; + break; + case GPIO_IN: + _port->DIR &= ~(1<<_pin); + break; + default: + return -1; + } gpio_init_mux(pin, 0); @@ -88,13 +89,13 @@ int gpio_init(gpio_t pin, gpio_mode_t mode) int gpio_init_mux(unsigned pin, unsigned mux) { (void) mux; - unsigned _pin = pin & 31; - PINSEL[pin>>4] &= ~(0x1 << (_pin*2)); + unsigned pos = (pin & 0xf) << 1; + PINSEL[pin>>4] &= ~(0x3 << pos); return 0; } int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank, - gpio_cb_t cb, void *arg) + gpio_cb_t cb, void *arg) { (void)mode; @@ -222,8 +223,7 @@ int gpio_read(gpio_t pin) unsigned _pin = pin & 31; unsigned port = pin >> 5; FIO_PORT_t *_port = &FIO_PORTS[port]; - _port->MASK = ~(1<<_pin); - return _port->PIN != 0; + return (_port->PIN & (1 << _pin)) != 0; } void gpio_set(gpio_t pin) @@ -231,8 +231,7 @@ void gpio_set(gpio_t pin) unsigned _pin = pin & 31; unsigned port = pin >> 5; FIO_PORT_t *_port = &FIO_PORTS[port]; - _port->MASK = ~(1<<_pin); - _port->SET = ~0; + _port->SET = 1 << _pin; } void gpio_clear(gpio_t pin) @@ -240,8 +239,7 @@ void gpio_clear(gpio_t pin) unsigned _pin = pin & 31; unsigned port = pin >> 5; FIO_PORT_t *_port = &FIO_PORTS[port]; - _port->MASK = ~(1<<_pin); - _port->CLR = ~0; + _port->CLR = 1 << _pin; } void gpio_toggle(gpio_t dev)