From 20ac4b060d2a513152a30ef68c1f7c528a9a1f73 Mon Sep 17 00:00:00 2001
From: dylad <dylan.laduranty@mesotic.com>
Date: Mon, 5 Mar 2018 21:27:03 +0100
Subject: [PATCH] cpu/saml21: fix RTC wrong condition for #if
---
cpu/saml21/periph/rtc.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/cpu/saml21/periph/rtc.c b/cpu/saml21/periph/rtc.c
index 5c31c67ed7..939c59689b 100644
--- a/cpu/saml21/periph/rtc.c
+++ b/cpu/saml21/periph/rtc.c
@@ -22,6 +22,13 @@
#include "periph/rtc.h"
#include "periph_conf.h"
+/* SAML21 rev B needs an extra bit, which in rev A defaults to 1, but isn't
+ * visible. Thus define it here. */
+#ifndef RTC_MODE2_CTRLA_CLOCKSYNC
+#define RTC_MODE2_CTRLA_CLOCKSYNC_Pos 15
+#define RTC_MODE2_CTRLA_CLOCKSYNC (0x1ul << RTC_MODE2_CTRLA_CLOCKSYNC_Pos)
+#endif
+
typedef struct {
rtc_alarm_cb_t cb; /**< callback called from RTC interrupt */
void *arg; /**< argument passed to the callback */
@@ -97,9 +104,7 @@ void rtc_init(void)
/* RTC config with RTC_MODE2_CTRL_CLKREP = 0 (24h) */
RTC->MODE2.CTRLA.reg = RTC_MODE2_CTRLA_PRESCALER_DIV1024 | /* CLK_RTC_CNT = 1KHz / 1024 -> 1Hz */
-#if (SAML21XXXB) || (SAMR30)
RTC_MODE2_CTRLA_CLOCKSYNC | /* Clock Read Synchronization Enable */
-#endif
RTC_MODE2_CTRLA_MODE_CLOCK; /* Mode 2: Clock/Calendar */
/* Clear interrupt flags */
--
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