From 318f0cf679b0c9215fbc5ca843245257c77bdefb Mon Sep 17 00:00:00 2001
From: Federico Pellegrin <fede@evolware.org>
Date: Wed, 30 Jan 2019 04:29:23 +0100
Subject: [PATCH] sam0 flashpage: make ready check inline, add wait also after
PBC
---
cpu/sam0_common/periph/flashpage.c | 23 +++++++++++++----------
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/cpu/sam0_common/periph/flashpage.c b/cpu/sam0_common/periph/flashpage.c
index c3468d3b0d..22ba4b8dd6 100644
--- a/cpu/sam0_common/periph/flashpage.c
+++ b/cpu/sam0_common/periph/flashpage.c
@@ -41,6 +41,16 @@
#define _NVMCTRL NVMCTRL
#endif
+static inline void wait_nvm_is_ready(void) __attribute__((always_inline));
+static inline void wait_nvm_is_ready(void)
+{
+#ifdef CPU_SAML1X
+ while (!_NVMCTRL->STATUS.bit.READY) {}
+#else
+ while (!_NVMCTRL->INTFLAG.bit.READY) {}
+#endif
+}
+
static void _unlock(void)
{
/* remove peripheral access lock for the NVMCTRL peripheral */
@@ -89,15 +99,12 @@ void flashpage_write_raw(void *target_addr, const void *data, size_t len)
_unlock();
_NVMCTRL->CTRLA.reg = (NVMCTRL_CTRLA_CMDEX_KEY | NVMCTRL_CTRLA_CMD_PBC);
+ wait_nvm_is_ready();
for (unsigned i = 0; i < len; i++) {
*dst++ = *data_addr++;
}
_NVMCTRL->CTRLA.reg = (NVMCTRL_CTRLA_CMDEX_KEY | NVMCTRL_CTRLA_CMD_WP);
-#ifdef CPU_SAML1X
- while (!_NVMCTRL->STATUS.bit.READY) {}
-#else
- while (!_NVMCTRL->INTFLAG.bit.READY) {}
-#endif
+ wait_nvm_is_ready();
_lock();
}
@@ -116,11 +123,7 @@ void flashpage_write(int page, const void *data)
_NVMCTRL->ADDR.reg = (((uint32_t)page_addr) >> 1);
#endif
_NVMCTRL->CTRLA.reg = (NVMCTRL_CTRLA_CMDEX_KEY | NVMCTRL_CTRLA_CMD_ER);
-#ifdef CPU_SAML1X
- while (!_NVMCTRL->STATUS.bit.READY) {}
-#else
- while (!_NVMCTRL->INTFLAG.bit.READY) {}
-#endif
+ wait_nvm_is_ready();
_lock();
/* write data to page */
--
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