From 3b42fb49b5aef82829f6b5aaacf24d5efe01427f Mon Sep 17 00:00:00 2001
From: Kaspar Schleiser <kaspar@schleiser.de>
Date: Mon, 5 Mar 2018 12:25:32 +0100
Subject: [PATCH] cpu/stm32: unify cpu_init()
---
.../cpu.c => stm32_common/cpu_init.c} | 9 +-
.../cpu.c => stm32_common/stmclk_l0l1.c} | 42 +++----
cpu/stm32f0/cpu.c | 35 ------
cpu/stm32f2/cpu.c | 32 ------
cpu/stm32f3/cpu.c | 36 ------
cpu/stm32f4/cpu.c | 37 -------
cpu/stm32f7/cpu.c | 37 -------
cpu/stm32l1/cpu.c | 104 ------------------
cpu/stm32l4/cpu.c | 39 -------
9 files changed, 27 insertions(+), 344 deletions(-)
rename cpu/{stm32f1/cpu.c => stm32_common/cpu_init.c} (80%)
rename cpu/{stm32l0/cpu.c => stm32_common/stmclk_l0l1.c} (85%)
delete mode 100644 cpu/stm32f0/cpu.c
delete mode 100644 cpu/stm32f2/cpu.c
delete mode 100644 cpu/stm32f3/cpu.c
delete mode 100644 cpu/stm32f4/cpu.c
delete mode 100644 cpu/stm32f7/cpu.c
delete mode 100644 cpu/stm32l1/cpu.c
delete mode 100644 cpu/stm32l4/cpu.c
diff --git a/cpu/stm32f1/cpu.c b/cpu/stm32_common/cpu_init.c
similarity index 80%
rename from cpu/stm32f1/cpu.c
rename to cpu/stm32_common/cpu_init.c
index d2cbf07dd2..978bec79f6 100644
--- a/cpu/stm32f1/cpu.c
+++ b/cpu/stm32_common/cpu_init.c
@@ -1,7 +1,9 @@
/*
* Copyright (C) 2013 INRIA
- * Copyright (C) 2014 Freie Universität Berlin
- * Copyright (C) 2016 TriaGnoSys GmbH
+ * 2014 Freie Universität Berlin
+ * 2016 TriaGnoSys GmbH
+ * 2018 Kaspar Schleiser <kaspar@schleiser.de>
+ *
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
@@ -9,7 +11,7 @@
*/
/**
- * @ingroup cpu_stm32f1
+ * @ingroup cpu_stm32_common
* @{
*
* @file
@@ -21,6 +23,7 @@
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Nick van IJzendoorn <nijzendoorn@engineering-spirit.nl>
* @author VÃctor Ariño <victor.arino@zii.aero>
+ * @author Kaspar Schleiser <kaspar@schleiser.de>
*
* @}
*/
diff --git a/cpu/stm32l0/cpu.c b/cpu/stm32_common/stmclk_l0l1.c
similarity index 85%
rename from cpu/stm32l0/cpu.c
rename to cpu/stm32_common/stmclk_l0l1.c
index a78f9767a1..9fbf118c00 100644
--- a/cpu/stm32l0/cpu.c
+++ b/cpu/stm32_common/stmclk_l0l1.c
@@ -1,18 +1,19 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
* 2017 Inria
+ * 2018 Kaspar Schleiser <kaspar@schleiser.de>
*
- * This file is subject to the terms and conditions of the GNU Lesser General
- * Public License v2.1. See the file LICENSE in the top level directory for more
- * details.
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
*/
/**
- * @ingroup cpu_stm32l0
+ * @ingroup cpu_stm32_common
* @{
*
* @file
- * @brief Implementation of the CPU initialization
+ * @brief Implementation of STM32 clock configuration
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
@@ -21,9 +22,11 @@
*/
#include "cpu.h"
+#include "board.h"
#include "periph_conf.h"
#include "periph/init.h"
+#if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1)
/* Check the source to be used for the PLL */
#if defined(CLOCK_HSI) && defined(CLOCK_HSE)
@@ -40,21 +43,6 @@
#error "Please provide CLOCK_HSI or CLOCK_HSE in boards/NAME/includes/perhip_cpu.h"
#endif
-static void clk_init(void);
-
-/**
- * @brief Initialize the CPU, set IRQ priorities
- */
-void cpu_init(void)
-{
- /* initialize the Cortex-M core */
- cortexm_init();
- /* initialize the clock system */
- clk_init();
- /* trigger static peripheral initialization */
- periph_init();
-}
-
/**
* @brief Configure the controllers clock system
*
@@ -72,7 +60,7 @@ void cpu_init(void)
* NOTE: currently there is not timeout for initialization of PLL and other locks
* -> when wrong values are chosen, the initialization could stall
*/
-static void clk_init(void)
+void stmclk_init_sysclk(void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set MSION bit */
@@ -82,7 +70,14 @@ static void clk_init(void)
/* Reset HSION, HSEON, CSSON and PLLON bits */
RCC->CR &= ~(RCC_CR_HSION | RCC_CR_HSEON | RCC_CR_HSEBYP | RCC_CR_CSSON | RCC_CR_PLLON);
/* Disable all interrupts */
+
+#if defined(CPU_FAM_STM32L0)
RCC->CICR = 0x0;
+#elif defined(CPU_FAM_STM32L1)
+ RCC->CIR = 0x0;
+#else
+#error unexpected MCU
+#endif
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration */
/* Enable high speed clock source */
@@ -90,6 +85,9 @@ static void clk_init(void)
/* Wait till the high speed clock source is ready
* NOTE: the MCU will stay here forever if you use an external clock source and it's not connected */
while (!(RCC->CR & CLOCK_CR_SOURCE_RDY)) {}
+#if defined(CPU_FAM_STM32L1)
+ FLASH->ACR |= FLASH_ACR_ACC64;
+#endif
/* Enable Prefetch Buffer */
FLASH->ACR |= FLASH_ACR_PRFTEN;
/* Flash 1 wait state */
@@ -119,3 +117,5 @@ static void clk_init(void)
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL) {}
}
+
+#endif /* defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) */
diff --git a/cpu/stm32f0/cpu.c b/cpu/stm32f0/cpu.c
deleted file mode 100644
index 1737da2e51..0000000000
--- a/cpu/stm32f0/cpu.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (C) 2014 Freie Universität Berlin
- *
- * This file is subject to the terms and conditions of the GNU Lesser General
- * Public License v2.1. See the file LICENSE in the top level directory for more
- * details.
- */
-
-/**
- * @ingroup cpu_stm32f0
- * @{
- *
- * @file
- * @brief Implementation of the CPU initialization
- *
- * @author Hauke Petersen <hauke.petersen@fu-berlin.de>
- * @}
- */
-
-#include "cpu.h"
-#include "stmclk.h"
-#include "periph/init.h"
-
-/**
- * @brief Initialize the CPU, set IRQ priorities
- */
-void cpu_init(void)
-{
- /* initialize the Cortex-M core */
- cortexm_init();
- /* initialize the clock system */
- stmclk_init_sysclk();
- /* trigger static peripheral initialization */
- periph_init();
-}
diff --git a/cpu/stm32f2/cpu.c b/cpu/stm32f2/cpu.c
deleted file mode 100644
index f840b330c4..0000000000
--- a/cpu/stm32f2/cpu.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (C) 2015 Engineering-Spirit
- *
- * This file is subject to the terms and conditions of the GNU Lesser General
- * Public License v2.1. See the file LICENSE in the top level directory for more
- * details.
- */
-
-/**
- * @ingroup cpu_stm32f2
- * @{
- *
- * @file
- * @brief Implementation of the kernel cpu functions
- *
- * @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
- * @}
- */
-
-#include "cpu.h"
-#include "stmclk.h"
-#include "periph/init.h"
-
-void cpu_init(void)
-{
- /* initialize the Cortex-M core */
- cortexm_init();
- /* initialize system clocks */
- stmclk_init_sysclk();
- /* trigger static peripheral initialization */
- periph_init();
-}
diff --git a/cpu/stm32f3/cpu.c b/cpu/stm32f3/cpu.c
deleted file mode 100644
index a9fa456b74..0000000000
--- a/cpu/stm32f3/cpu.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright (C) 2014 Freie Universität Berlin
- *
- * This file is subject to the terms and conditions of the GNU Lesser General
- * Public License v2.1. See the file LICENSE in the top level directory for more
- * details.
- */
-
-/**
- * @ingroup cpu_stm32f3
- * @{
- *
- * @file
- * @brief Implementation of the CPU initialization
- *
- * @author Hauke Petersen <hauke.petersen@fu-berlin.de>
- * @author Nick van IJzendoorn <nijzendoorn@engineering-spirit.nl>
- * @}
- */
-
-#include "cpu.h"
-#include "periph/init.h"
-#include "stmclk.h"
-
-/**
- * @brief Initialize the CPU, set IRQ priorities
- */
-void cpu_init(void)
-{
- /* initialize the Cortex-M core */
- cortexm_init();
- /* initialize the clock system */
- stmclk_init_sysclk();
- /* trigger static peripheral initialization */
- periph_init();
-}
diff --git a/cpu/stm32f4/cpu.c b/cpu/stm32f4/cpu.c
deleted file mode 100644
index feb5bab21c..0000000000
--- a/cpu/stm32f4/cpu.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (C) 2014 Freie Universität Berlin
- *
- * This file is subject to the terms and conditions of the GNU Lesser General
- * Public License v2.1. See the file LICENSE in the top level directory for more
- * details.
- */
-
-/**
- * @ingroup cpu_stm32f4
- * @{
- *
- * @file
- * @brief Implementation of the CPU initialization
- *
- * @author Hauke Petersen <hauke.petersen@fu-berlin.de>
- * @author Nick van IJzendoorn <nijzendoorn@engineering-spirit.nl>
- * @}
- */
-
-#include <stdint.h>
-#include "cpu.h"
-#include "stmclk.h"
-#include "periph/init.h"
-
-/**
- * @brief Initialize the CPU, set IRQ priorities
- */
-void cpu_init(void)
-{
- /* initialize the Cortex-M core */
- cortexm_init();
- /* initialize the clock system */
- stmclk_init_sysclk();
- /* trigger static peripheral initialization */
- periph_init();
-}
diff --git a/cpu/stm32f7/cpu.c b/cpu/stm32f7/cpu.c
deleted file mode 100644
index 16d1d34aea..0000000000
--- a/cpu/stm32f7/cpu.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (C) 2017 Freie Universität Berlin
- *
- * This file is subject to the terms and conditions of the GNU Lesser
- * General Public License v2.1. See the file LICENSE in the top level
- * directory for more details.
- */
-
-/**
- * @ingroup cpu_stm32f7
- * @{
- *
- * @file
- * @brief Implementation of the CPU initialization
- *
- * @todo Move this file into the stm32_common source tree
- *
- * @author Hauke Petersen <hauke.petersen@fu-berlin.de>
- * @}
- */
-
-#include "cpu.h"
-#include "stmclk.h"
-#include "periph/init.h"
-
-/**
- * @brief Initialize the CPU, set IRQ priorities
- */
-void cpu_init(void)
-{
- /* initialize the Cortex-M core */
- cortexm_init();
- /* initialize the system clock as configured in the periph_conf.h */
- stmclk_init_sysclk();
- /* trigger static peripheral initialization */
- periph_init();
-}
diff --git a/cpu/stm32l1/cpu.c b/cpu/stm32l1/cpu.c
deleted file mode 100644
index f0ebc74e62..0000000000
--- a/cpu/stm32l1/cpu.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Copyright (C) 2014 Freie Universität Berlin
- *
- * This file is subject to the terms and conditions of the GNU Lesser General
- * Public License v2.1. See the file LICENSE in the top level directory for more
- * details.
- */
-
-/**
- * @ingroup cpu_stm32l1
- * @{
- *
- * @file
- * @brief Implementation of the kernel cpu functions
- *
- * @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
- * @author Nick van IJzendoorn <nijzendoorn@engineering-spirit.nl>
- *
- * @}
- */
-
-#include "cpu.h"
-#include "board.h"
-#include "periph_conf.h"
-#include "periph/init.h"
-
-/* Check the source to be used for the PLL */
-#if defined(CLOCK_HSI) && defined(CLOCK_HSE)
-#error "Only provide one of two CLOCK_HSI/CLOCK_HSE"
-#elif CLOCK_HSI
-#define CLOCK_CR_SOURCE RCC_CR_HSION
-#define CLOCK_CR_SOURCE_RDY RCC_CR_HSIRDY
-#define CLOCK_PLL_SOURCE RCC_CFGR_PLLSRC_HSI
-#elif CLOCK_HSE
-#define CLOCK_CR_SOURCE RCC_CR_HSEON
-#define CLOCK_CR_SOURCE_RDY RCC_CR_HSERDY
-#define CLOCK_PLL_SOURCE RCC_CFGR_PLLSRC_HSE
-#else
-#error "Please provide CLOCK_HSI or CLOCK_HSE in boards/NAME/includes/perhip_cpu.h"
-#endif
-
-static void clk_init(void);
-
-void cpu_init(void)
-{
- /* initialize the Cortex-M core */
- cortexm_init();
- /* initialize system clocks */
- clk_init();
- /* trigger static peripheral initialization */
- periph_init();
-}
-
-/**
- * @brief Configure the clock system of the stm32f1
- */
-static void clk_init(void)
-{
- /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
- /* Set MSION bit */
- RCC->CR |= RCC_CR_MSION;
- /* Reset SW, HPRE, PPRE1, PPRE2, MCOSEL and MCOPRE bits */
- RCC->CFGR &= ~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLDIV | RCC_CFGR_PLLMUL);
- /* Reset HSION, HSEON, CSSON and PLLON bits */
- RCC->CR &= ~(RCC_CR_HSION | RCC_CR_HSEON | RCC_CR_HSEBYP | RCC_CR_CSSON | RCC_CR_PLLON);
- /* Disable all interrupts */
- RCC->CIR = 0x0;
-
- /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration */
- /* Enable high speed clock source */
- RCC->CR |= CLOCK_CR_SOURCE;
- /* Wait till the high speed clock source is ready
- * NOTE: the MCU will stay here forever if you use an external clock source and it's not connected */
- while (!(RCC->CR & CLOCK_CR_SOURCE_RDY)) {}
- FLASH->ACR |= FLASH_ACR_ACC64;
- /* Enable Prefetch Buffer */
- FLASH->ACR |= FLASH_ACR_PRFTEN;
- /* Flash 1 wait state */
- FLASH->ACR |= CLOCK_FLASH_LATENCY;
- /* Power enable */
- periph_clk_en(APB1, RCC_APB1ENR_PWREN);
- /* Select the Voltage Range 1 (1.8 V) */
- PWR->CR = PWR_CR_VOS_0;
- /* Wait Until the Voltage Regulator is ready */
- while((PWR->CSR & PWR_CSR_VOSF) != 0) {}
- /* HCLK = SYSCLK */
- RCC->CFGR |= (uint32_t)CLOCK_AHB_DIV;
- /* PCLK2 = HCLK */
- RCC->CFGR |= (uint32_t)CLOCK_APB2_DIV;
- /* PCLK1 = HCLK */
- RCC->CFGR |= (uint32_t)CLOCK_APB1_DIV;
- /* PLL configuration: PLLCLK = CLOCK_SOURCE / PLL_DIV * PLL_MUL */
- RCC->CFGR &= ~((uint32_t)(RCC_CFGR_PLLSRC | RCC_CFGR_PLLDIV | RCC_CFGR_PLLMUL));
- RCC->CFGR |= (uint32_t)(CLOCK_PLL_SOURCE | CLOCK_PLL_DIV | CLOCK_PLL_MUL);
- /* Enable PLL */
- RCC->CR |= RCC_CR_PLLON;
- /* Wait till PLL is ready */
- while ((RCC->CR & RCC_CR_PLLRDY) == 0) {}
- /* Select PLL as system clock source */
- RCC->CFGR &= ~((uint32_t)(RCC_CFGR_SW));
- RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
- /* Wait till PLL is used as system clock source */
- while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL) {}
-}
diff --git a/cpu/stm32l4/cpu.c b/cpu/stm32l4/cpu.c
deleted file mode 100644
index 66727deaff..0000000000
--- a/cpu/stm32l4/cpu.c
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (C) 2017 Freie Universität Berlin
- * 2017 HAW-Hamburg
- *
- * This file is subject to the terms and conditions of the GNU Lesser
- * General Public License v2.1. See the file LICENSE in the top level
- * directory for more details.
- */
-
-/**
- * @ingroup cpu_stm32l4
- * @{
- *
- * @file
- * @brief Implementation of the CPU initialization
- *
- * @author Hauke Petersen <hauke.petersen@fu-berlin.de>
- * @author Nick van IJzendoorn <nijzendoorn@engineering-spirit.nl>
- * @author Michel Rottleuthner <michel.rottleuthner@haw-hamburg.de>
- * @}
- */
-
-#include <stdint.h>
-#include "cpu.h"
-#include "stmclk.h"
-#include "periph/init.h"
-
-/**
- * @brief Initialize the CPU, set IRQ priorities
- */
-void cpu_init(void)
-{
- /* initialize the Cortex-M core */
- cortexm_init();
- /* initialize the clock system */
- stmclk_init_sysclk();
- /* trigger static peripheral initialization */
- periph_init();
-}
--
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