From 3fe5b26632f25af6c07c23e5bb7c10da1e1f6e0b Mon Sep 17 00:00:00 2001
From: Hauke Petersen <hauke.petersen@fu-berlin.de>
Date: Tue, 1 Mar 2016 15:56:45 +0100
Subject: [PATCH] boards/arduino-due: added clock configuration
---
boards/arduino-due/board.c | 3 ---
boards/arduino-due/include/periph_conf.h | 15 ++++++++++++++-
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/boards/arduino-due/board.c b/boards/arduino-due/board.c
index 4196be5268..bc87296236 100644
--- a/boards/arduino-due/board.c
+++ b/boards/arduino-due/board.c
@@ -29,9 +29,6 @@ void led_init(void);
void board_init(void)
{
- /* initialize core clocks via CMSIS function provided by Atmel */
- SystemInit();
-
/* initialize the CPU */
cpu_init();
diff --git a/boards/arduino-due/include/periph_conf.h b/boards/arduino-due/include/periph_conf.h
index a3ab07e8c3..cef749f238 100644
--- a/boards/arduino-due/include/periph_conf.h
+++ b/boards/arduino-due/include/periph_conf.h
@@ -31,7 +31,20 @@ extern "C" {
* @name Clock configuration
* @{
*/
-#define CLOCK_CORECLOCK (84000000U)
+/* targeted system core clock */
+#define CLOCK_CORECLOCK (84000000UL)
+/* external oscillator clock */
+#define CLOCK_EXT_OSC (12000000UL)
+/* define PLL configuration
+ *
+ * The values must fulfill this equation:
+ * CORECLOCK = (EXT_OCS / PLL_DIV) * (PLL_MUL + 1)
+ */
+#define CLOCK_PLL_MUL (83)
+#define CLOCK_PLL_DIV (12)
+
+/* number of wait states before flash read and write operations */
+#define CLOCK_FWS (4) /* 4 is save for 84MHz */
/** @} */
/**
--
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