From 46bf22a01d3954e51caecd718aab52b68ba6a78d Mon Sep 17 00:00:00 2001
From: Hauke Petersen <hauke.petersen@fu-berlin.de>
Date: Sat, 20 Feb 2016 16:47:12 +0100
Subject: [PATCH] cpu/stm32f3: adapted GPIO driver
---
cpu/stm32f3/include/periph_cpu.h | 25 ++++++++++++++++++++
cpu/stm32f3/periph/gpio.c | 39 ++++++++++++++------------------
2 files changed, 42 insertions(+), 22 deletions(-)
diff --git a/cpu/stm32f3/include/periph_cpu.h b/cpu/stm32f3/include/periph_cpu.h
index bfb65319cf..0c5a5e7bca 100644
--- a/cpu/stm32f3/include/periph_cpu.h
+++ b/cpu/stm32f3/include/periph_cpu.h
@@ -43,6 +43,31 @@ typedef uint32_t gpio_t;
*/
#define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y)
+/**
+ * @brief Generate GPIO mode bitfields
+ *
+ * We use 5 bit to encode the mode:
+ * - bit 0+1: pin mode (input / output)
+ * - bit 2+3: pull resistor configuration
+ * - bit 4: output type (0: push-pull, 1: open-drain)
+ */
+#define GPIO_MODE(io, pr, ot) ((io << 0) | (pr << 2) | (ot << 4))
+
+/**
+ * @brief Override GPIO mode options
+ * @{
+ */
+#define HAVE_GPIO_MODE_T
+typedef enum {
+ GPIO_IN = GPIO_MODE(0, 0, 0), /**< input w/o pull R */
+ GPIO_IN_PD = GPIO_MODE(0, 2, 0), /**< input with pull-down */
+ GPIO_IN_PU = GPIO_MODE(0, 1, 0), /**< input with pull-up */
+ GPIO_OUT = GPIO_MODE(1, 0, 0), /**< push-pull output */
+ GPIO_OD = GPIO_MODE(1, 0, 1), /**< open-drain w/o pull R */
+ GPIO_OD_PU = GPIO_MODE(1, 1, 1) /**< open-drain with pull-up */
+} gpio_mode_t;
+/** @} */
+
/**
* @brief Available ports on the STM32F3 family
*/
diff --git a/cpu/stm32f3/periph/gpio.c b/cpu/stm32f3/periph/gpio.c
index 17cec769bc..b13a7515c8 100644
--- a/cpu/stm32f3/periph/gpio.c
+++ b/cpu/stm32f3/periph/gpio.c
@@ -24,9 +24,6 @@
#include "periph/gpio.h"
#include "periph_conf.h"
-#define ENABLE_DEBUG (0)
-#include "debug.h"
-
/**
* @brief The STM32F3 has 16 EXTI channels
*/
@@ -64,33 +61,31 @@ static inline int _pin_num(gpio_t pin)
return (pin & 0x0f);
}
-int gpio_init(gpio_t pin, gpio_dir_t dir, gpio_pp_t pushpull)
+int gpio_init(gpio_t pin, gpio_mode_t mode)
{
GPIO_TypeDef *port = _port(pin);
int pin_num = _pin_num(pin);
- DEBUG("Init %i: port %i, pin %i\n", dir, pin_num, _port_num(pin));
-
/* enable clock */
RCC->AHBENR |= (RCC_AHBENR_GPIOAEN << _port_num(pin));
- /* configure pull register */
- port->PUPDR &= ~(3 << (2 * pin_num));
- port->PUPDR |= (pushpull << (2 * pin_num));
- /* set direction */
- if (dir == GPIO_DIR_OUT) {
- port->MODER &= ~(3 << (2 * pin_num)); /* set pin to output mode */
- port->MODER |= (1 << (2 * pin_num));
- port->OTYPER &= ~(1 << pin_num); /* set to push-pull */
- port->OSPEEDR |= (3 << (2 * pin_num)); /* set to high speed */
- port->ODR &= ~(1 << pin_num); /* set pin to low signal */
- }
- else {
- port->MODER &= ~(3 << (2 * pin_num)); /* configure pin as input */
- }
+
+ /* set mode */
+ port->MODER &= ~(0x3 << (2 * pin_num));
+ port->MODER |= ((mode & 0x3) << (2 * pin_num));
+ /* set pull resistor configuration */
+ port->PUPDR &= ~(0x3 << (2 * pin_num));
+ port->PUPDR |= (((mode >> 2) & 0x3) << (2 * pin_num));
+ /* set output mode */
+ port->OTYPER &= ~(1 << pin_num);
+ port->OTYPER |= (((mode >> 4) & 0x1) << pin_num);
+ /* reset speed value and clear pin */
+ port->OSPEEDR |= (3 << (2 * pin_num));
+ port->BSRRH = (1 << pin_num);
+
return 0;
}
-int gpio_init_int(gpio_t pin, gpio_pp_t pullup, gpio_flank_t flank,
+int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
gpio_cb_t cb, void *arg)
{
int pin_num = _pin_num(pin);
@@ -102,7 +97,7 @@ int gpio_init_int(gpio_t pin, gpio_pp_t pullup, gpio_flank_t flank,
/* enable the SYSCFG clock */
RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
/* configure pin as input */
- gpio_init(pin, GPIO_DIR_IN, pullup);
+ gpio_init(pin, mode);
/* enable global pin interrupt */
if (pin_num < 5) {
NVIC_EnableIRQ(EXTI0_IRQn + pin_num);
--
GitLab