diff --git a/cpu/sam0_common/include/periph_cpu_common.h b/cpu/sam0_common/include/periph_cpu_common.h
index 81e4f22a3e2f4b5a43fc2d3601c4d1c09e8c887d..c13cf273b1f973731e2b2adf902034f50e289bcf 100644
--- a/cpu/sam0_common/include/periph_cpu_common.h
+++ b/cpu/sam0_common/include/periph_cpu_common.h
@@ -217,6 +217,60 @@ static inline int sercom_id(void *sercom)
 #endif
 }
 
+/**
+ * @brief   Enable peripheral clock for given SERCOM device
+ *
+ * @param[in] sercom    SERCOM device
+ */
+static inline void sercom_clk_en(void *sercom)
+{
+#if defined(CPU_FAM_SAMD21)
+    PM->APBCMASK.reg |= (PM_APBCMASK_SERCOM0 << sercom_id(sercom));
+#elif defined(CPU_FAM_SAML21)
+    if (sercom_id(sercom) < 5) {
+        MCLK->APBCMASK.reg |= (MCLK_APBCMASK_SERCOM0 << sercom_id(sercom));
+    } else {
+        MCLK->ABPDMASK.reg |= (MCLK_APBCMASK_SERCOM5);
+    }
+#endif
+}
+
+/**
+ * @brief   Disable peripheral clock for given SERCOM device
+ *
+ * @param[in] sercom    SERCOM device
+ */
+static inline void sercom_clk_dis(void *sercom)
+{
+#if defined(CPU_FAM_SAMD21)
+    PM->APBCMASK.reg &= ~(PM_APBCMASK_SERCOM0 << sercom_id(sercom));
+#elif defined(CPU_FAM_SAML21)
+    if (sercom_id(sercom) < 5) {
+        MCLK->APBCMASK.reg &= ~(MCLK_APBCMASK_SERCOM0 << sercom_id(sercom));
+    } else {
+        MCLK->ABPDMASK.reg &= ~(MCLK_APBCMASK_SERCOM5);
+    }
+#endif
+}
+
+/**
+ * @brief   Configure generator clock for given SERCOM device
+ *
+ * @param[in] sercom    SERCOM device
+ * @param[in] gclk      Generator clock
+ */
+static inline void sercom_set_gen(void *sercom, uint32_t gclk)
+{
+#if defined(CPU_FAM_SAMD21)
+    GCLK->CLKCTRL.reg = (GCLK_CLKCTRL_CLKEN | gclk |
+                         (SERCOM0_GCLK_ID_CORE + sercom_id(sercom)));
+    while (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY) {}
+#elif defined(CPU_FAM_SAML21)
+    GCLK->PCHCTRL[SERCOM0_GCLK_ID_CORE + sercom_id(sercom)].reg =
+                                                    (GCLK_PCHCTRL_CHEN | gclk);
+#endif
+}
+
 /**
  * @brief ADC Channel Configuration
  */