From 5ef7adfbcb47a861bb3222a7054787c1cb41d980 Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Sun, 14 Oct 2018 15:08:31 +0200
Subject: [PATCH] cpu/esp32: fix problem with tests/thread_race
The problem seemed to be a pipelining problem of write and read instructions when swapping the context. An isync instruction when returning from a context switch solves the potential pipelining problem.
---
cpu/esp32/thread_arch.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/cpu/esp32/thread_arch.c b/cpu/esp32/thread_arch.c
index 2c97517b9f..713e30907e 100644
--- a/cpu/esp32/thread_arch.c
+++ b/cpu/esp32/thread_arch.c
@@ -247,6 +247,13 @@ void thread_yield_higher(void)
}
#endif
+ /*
+ * Instruction fetch synchronize: Waits for all previously fetched load,
+ * store, cache, and special register write instructions that affect
+ * instruction fetch to be performed before fetching the next instruction.
+ */
+ __asm__("isync");
+
return;
}
--
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