From 6a32f1ddd2a2fc853704e547c1e2b3de9b9f59da Mon Sep 17 00:00:00 2001 From: Francisco Acosta <fco.ja.ac@gmail.com> Date: Mon, 5 Feb 2018 17:10:49 +0100 Subject: [PATCH] boards/nucleo-l152: configure LSI by default --- boards/nucleo-l152/include/periph_conf.h | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/boards/nucleo-l152/include/periph_conf.h b/boards/nucleo-l152/include/periph_conf.h index 2e6b965946..49c12913f7 100644 --- a/boards/nucleo-l152/include/periph_conf.h +++ b/boards/nucleo-l152/include/periph_conf.h @@ -34,9 +34,17 @@ extern "C" { **/ #define CLOCK_HSI (16000000U) /* frequency of internal oscillator */ #define CLOCK_CORECLOCK (32000000U) /* targeted core clock frequency */ -/* 0: no external low speed crystal available, - * 1: external crystal available (always 32.768kHz) */ -#define CLOCK_LSE (1) +/* + * 0: no external low speed crystal available, + * 1: external crystal available (always 32.768kHz) + * + * LSE might not be available by default in early (C-01) Nucleo boards. + * For newer revisions, LSE crystal is present, but currently is not working. + * (issue at https://github.com/RIOT-OS/RIOT/pull/8545). + */ +#ifndef CLOCK_LSE +#define CLOCK_LSE (0) +#endif /* configuration of PLL prescaler and multiply values */ /* CORECLOCK := HSI / CLOCK_PLL_DIV * CLOCK_PLL_MUL */ #define CLOCK_PLL_DIV RCC_CFGR_PLLDIV2 -- GitLab