From 70aa86e5e6595fea381bd08061ce9e2f2fa69a82 Mon Sep 17 00:00:00 2001
From: Hauke Petersen <hauke.petersen@fu-berlin.de>
Date: Thu, 16 Nov 2017 15:31:45 +0100
Subject: [PATCH] boards/common/wsn30: cleanup clock configuration

---
 boards/common/wsn430/board_init.c          | 128 +++++++++------------
 boards/common/wsn430/include/board.h       |  12 --
 boards/common/wsn430/include/periph_conf.h |   9 +-
 3 files changed, 57 insertions(+), 92 deletions(-)

diff --git a/boards/common/wsn430/board_init.c b/boards/common/wsn430/board_init.c
index 1792308d73..521e248f2f 100644
--- a/boards/common/wsn430/board_init.c
+++ b/boards/common/wsn430/board_init.c
@@ -1,6 +1,6 @@
 /*
- * board_init.c - Implementation of functions to init board.
  * Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de>
+ *               2017 Freie Universität Berlin
  *
  * This file is subject to the terms and conditions of the GNU Lesser
  * General Public License v2.1. See the file LICENSE in the top level
@@ -15,103 +15,76 @@
   * @brief       Board initialization for WSN430
   *
   * @author      Milan Babel <babel@inf.fu-berlin.de>
+  * @author      Hauke Petersen <hauke.petersen@fu-berlin.de>
   *
   * @}
   */
 
 #include "cpu.h"
 #include "irq.h"
-#include "board.h"
-#include "msp430.h"
-#include "debug.h"
+#include "assert.h"
 #include "uart_stdio.h"
+#include "periph_conf.h"
 
-static volatile uint32_t __msp430_cpu_speed = MSP430_INITIAL_CPU_SPEED;
-
-void msp430_init_dco(void);
-
-typedef enum {
-    MCLK_2MHZ_SCLK_1MHZ = 1000002uL,
-    MCLK_4MHZ_SCLK_1MHZ = 1000004uL,
-    MCLK_8MHZ_SCLK_1MHZ = 1000008uL,
-    MCLK_8MHZ_SCLK_8MHZ = 8000000uL
-}speed_t;
+enum {
+    MCLK_2MHZ_SCLK_1MHZ = (SELM_2 | DIVM_2 | SELS | DIVS_3),
+    MCLK_4MHZ_SCLK_1MHZ = (SELM_2 | DIVM_1 | SELS | DIVS_3),
+    MCLK_8MHZ_SCLK_1MHZ = (SELM_2 | SELS | DIVS_3),
+    MCLK_8MHZ_SCLK_8MHZ = (SELM_2 | SELS),
+};
 
 static void msb_ports_init(void)
 {
-    // Port 1: GDO, Flash, BSL TX
-    P1SEL = 0x02;    // Port1 Select: 00000010 = 0x02
-    P1OUT = 0x00;    // Port1 Output: 00000000 = 0x00
-    P1DIR = 0x87;    // Port1 Direction: 10000111 = 0x87
+    /* Port 1: GDO, Flash, BSL TX */
+    P1SEL = 0x02;    /* Port1 Select: 00000010 = 0x02 */
+    P1OUT = 0x00;    /* Port1 Output: 00000000 = 0x00 */
+    P1DIR = 0x87;    /* Port1 Direction: 10000111 = 0x87 */
 
-    // Port 2: GPIO, BSL RX, 1wire
-    P2SEL = 0x04;    // Port2 Select: 00000100 = 0x04
-    P2OUT = 0x00;    // Port2 Output: 00000000 = 0x00
-    P2DIR = 0xFF;    // Port2 Direction: 11111111 = 0xFF
+    /* Port 2: GPIO, BSL RX, 1wire */
+    P2SEL = 0x04;    /* Port2 Select: 00000100 = 0x04 */
+    P2OUT = 0x00;    /* Port2 Output: 00000000 = 0x00 */
+    P2DIR = 0xFF;    /* Port2 Direction: 11111111 = 0xFF */
 
 
-    // Port 3: UART
-    P3SEL = 0xFE;    // Port3 Select: 11111110 = 0xFE
-    P3OUT = 0x00;    // Port3 Output: 00000000 = 0x00
-    P3DIR = 0xFF;    // Port3 Direction: 11111111 = 0xFF
+    /* Port 3: UART */
+    P3SEL = 0xFE;    /* Port3 Select: 11111110 = 0xFE */
+    P3OUT = 0x00;    /* Port3 Output: 00000000 = 0x00 */
+    P3DIR = 0xFF;    /* Port3 Direction: 11111111 = 0xFF */
 
 
-    // Port 4: CS
-    P4SEL = 0x00;    // Port4 Select: 00000000 = 0x00
-    P4OUT = 0x14;    // Port4 Output: 00010100 = 0x14
-    P4DIR = 0xFF;    // Port4 Direction: 11111111 = 0xFF
+    /* Port 4: CS */
+    P4SEL = 0x00;    /* Port4 Select: 00000000 = 0x00 */
+    P4OUT = 0x14;    /* Port4 Output: 00010100 = 0x14 */
+    P4DIR = 0xFF;    /* Port4 Direction: 11111111 = 0xFF */
 
-    // Port 5: SPI, LED
-    P5SEL = 0x0E;    // Port5 Select: 00001110 = 0x0E
-    P5OUT = 0x70;    // Port5 Output: 01110000 = 0x70
-    P5DIR = 0x70;    // Port5 Direction: 01110000 = 0x70
+    /* Port 5: SPI, LED */
+    P5SEL = 0x0E;    /* Port5 Select: 00001110 = 0x0E */
+    P5OUT = 0x70;    /* Port5 Output: 01110000 = 0x70 */
+    P5DIR = 0x70;    /* Port5 Direction: 01110000 = 0x70 */
 
 
-    P6SEL = 0xFF;    // Port6 Select: 11111111 = 0xFF
-    P6OUT = 0x00;    // Port6 Output: 00000000 = 0x00
-    P6DIR = 0xFF;    // Port6 Direction: 11111000 = 0xF8
+    P6SEL = 0xFF;    /* Port6 Select: 11111111 = 0xFF */
+    P6OUT = 0x00;    /* Port6 Output: 00000000 = 0x00 */
+    P6DIR = 0xFF;    /* Port6 Direction: 11111000 = 0xF8 */
 
 }
 
-void msp430_set_cpu_speed(uint32_t speed)
-{
-    irq_disable();
-    __msp430_cpu_speed = speed;
-    msp430_init_dco();
-    irq_enable();
-}
-
-/*---------------------------------------------------------------------------*/
-void msp430_init_dco(void)
+static void msp430_init_cpuclk(uint8_t speed)
 {
-  /*----------------------- use external oszillator -------------------------*/
-  uint16_t i;
-
-  // Stop watchdog
-  WDTCTL = WDTPW + WDTHOLD;
-
-  BCSCTL1 = RSEL2;
-
-  // Wait for xtal to stabilize
-  do {
-    IFG1 &= ~OFIFG;                // Clear oscillator fault flag
-    for (i = 0xFF; i > 0; i--);    // Time for flag to set
-  }
-  while ((IFG1 & OFIFG) != 0);     // Oscillator fault flag still set?
-  switch (__msp430_cpu_speed) {
-  case MCLK_2MHZ_SCLK_1MHZ:
-      BCSCTL2  = (SELM_2 | DIVM_2) | (SELS | DIVS_3);
-      break;
-  case MCLK_4MHZ_SCLK_1MHZ:
-      BCSCTL2  = (SELM_2 | DIVM_1) | (SELS | DIVS_3);
-      break;
-  case MCLK_8MHZ_SCLK_1MHZ:
-      BCSCTL2 = SELM_2 | (SELS | DIVS_3);
-      break;
-  default:
-      BCSCTL2 = SELM_2 + SELS;     // MCLK and SMCLK = XT2 (safe)
-      break;
-  }
+    /* stop watchdog */
+    WDTCTL = WDTPW + WDTHOLD;
+    BCSCTL1 = RSEL2;
+
+    /* wait for XTAL to stabilize */
+    do {
+        /* clear oscillator fault flag */
+        IFG1 &= ~OFIFG;
+        /* time for flag to set */
+        for (uint16_t i = 0xFF; i > 0; i--) {}
+    } while ((IFG1 & OFIFG) != 0);
+
+    /* apply clock config */
+    BCSCTL2 = speed;
 }
 
 void board_init(void)
@@ -119,7 +92,10 @@ void board_init(void)
     msp430_cpu_init();
     msb_ports_init();
 
-    msp430_set_cpu_speed(MCLK_8MHZ_SCLK_8MHZ);
+    /* initialize CPU clock */
+    unsigned state = irq_disable();
+    msp430_init_cpuclk(CLOCK_MODE);
+    irq_restore(state);
 
     /* initialize STDIO over UART */
     uart_stdio_init();
diff --git a/boards/common/wsn430/include/board.h b/boards/common/wsn430/include/board.h
index 6a39234d32..bc6a6714d5 100644
--- a/boards/common/wsn430/include/board.h
+++ b/boards/common/wsn430/include/board.h
@@ -43,18 +43,6 @@ extern "C" {
 #define XTIMER_BACKOFF              (40)
 /** @} */
 
-/**
- * @name    CPU core configuration
- * @{
- */
-/** @todo   Move this to the periph_conf.h */
-#define MSP430_INITIAL_CPU_SPEED    800000uL
-#define F_CPU                       MSP430_INITIAL_CPU_SPEED
-#define F_RC_OSCILLATOR             32768
-#define MSP430_HAS_DCOR             0
-#define MSP430_HAS_EXTERNAL_CRYSTAL 1
-/** @} */
-
 /**
  * @name    LED pin definitions and handlers
  * @{
diff --git a/boards/common/wsn430/include/periph_conf.h b/boards/common/wsn430/include/periph_conf.h
index 879518e821..ff36261d90 100644
--- a/boards/common/wsn430/include/periph_conf.h
+++ b/boards/common/wsn430/include/periph_conf.h
@@ -15,7 +15,7 @@
  * @brief       WSN430 peripheral configuration
  *
  * @author      Oliver Hahm <oliver.hahm@inria.fr>
- *              Hauke Petersen <hauke.petersen@fu-berlin.de>
+ * @author      Hauke Petersen <hauke.petersen@fu-berlin.de>
  */
 
 #ifndef PERIPH_CONF_H
@@ -29,9 +29,9 @@ extern "C" {
  * @name    Clock configuration
  * @{
  */
-#define CLOCK_CORECLOCK     (8000000U)
-
-#define CLOCK_CMCLK         CLOCK_CORECLOCK     /* no divider programmed */
+#define CLOCK_CORECLOCK     (8000000UL)
+#define CLOCK_MODE          (MCLK_8MHZ_SCLK_8MHZ)
+#define CLOCK_CMCLK         (CLOCK_CORECLOCK)       /* no divider programmed */
 /** @} */
 
 /**
@@ -91,3 +91,4 @@ extern "C" {
 #endif
 
 #endif /* PERIPH_CONF_H */
+/** @} */
-- 
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