From 723d86bab03318374d6d4fbe1a554f7ba30e0e14 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Joakim=20Nohlg=C3=A5rd?= <joakim.nohlgard@eistec.se>
Date: Sat, 17 Mar 2018 10:08:24 +0100
Subject: [PATCH] boards/mulle: Fix mixed up RX TX pins on UART0
---
boards/mulle/include/periph_conf.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/boards/mulle/include/periph_conf.h b/boards/mulle/include/periph_conf.h
index f36c4fa0bb..19f1a23431 100644
--- a/boards/mulle/include/periph_conf.h
+++ b/boards/mulle/include/periph_conf.h
@@ -128,8 +128,8 @@ static const uart_conf_t uart_config[] = {
{
.dev = UART0,
.freq = CLOCK_CORECLOCK,
- .pin_rx = GPIO_PIN(PORT_A, 14),
- .pin_tx = GPIO_PIN(PORT_A, 15),
+ .pin_rx = GPIO_PIN(PORT_A, 15),
+ .pin_tx = GPIO_PIN(PORT_A, 14),
.pcr_rx = PORT_PCR_MUX(3),
.pcr_tx = PORT_PCR_MUX(3),
.irqn = UART0_RX_TX_IRQn,
--
GitLab