diff --git a/cpu/arm7_common/include/VIC.h b/cpu/arm7_common/include/VIC.h
index 8299e4a812845731c2f6fde43fdc10be17189462..f293f7d4f2a287de13924dcef1f1fda62e4bafd8 100644
--- a/cpu/arm7_common/include/VIC.h
+++ b/cpu/arm7_common/include/VIC.h
@@ -9,7 +9,7 @@
#define __ARM_COMMON_H
#ifdef __cplusplus
- extern "C" {
+extern "C" {
#endif
/**
diff --git a/cpu/arm7_common/include/arm7_common.h b/cpu/arm7_common/include/arm7_common.h
index 7dca2e89fab652d7603d9b595c46f0d648719a66..6f2379d545b8463c331ed4da74759c216d34a463 100644
--- a/cpu/arm7_common/include/arm7_common.h
+++ b/cpu/arm7_common/include/arm7_common.h
@@ -27,7 +27,7 @@
#include "bitarithm.h"
#ifdef __cplusplus
- extern "C" {
+extern "C" {
#endif
/**
diff --git a/cpu/arm7_common/include/hwtimer_cpu.h b/cpu/arm7_common/include/hwtimer_cpu.h
index 780db3d0cad6b601ef67ac19daa6aa096736a69e..8e1d3eb79209241f35b2f60ca6b453b7a92f727e 100644
--- a/cpu/arm7_common/include/hwtimer_cpu.h
+++ b/cpu/arm7_common/include/hwtimer_cpu.h
@@ -20,7 +20,7 @@
#define HWTIMER_CPU_H_
#ifdef __cplusplus
- extern "C" {
+extern "C" {
#endif
#define HWTIMER_MAXTIMERS 4
diff --git a/cpu/arm7_common/include/iap.h b/cpu/arm7_common/include/iap.h
index 217157ccd17081c70d7fe9c3b1f42f8ea420295b..0995908dae6bd9ab56d61b485a34d985867f9d14 100644
--- a/cpu/arm7_common/include/iap.h
+++ b/cpu/arm7_common/include/iap.h
@@ -12,7 +12,7 @@
#include <stdint.h>
#ifdef __cplusplus
- extern "C" {
+extern "C" {
#endif
/* IAP-Commands */
diff --git a/cpu/atmega2560/include/cpu-conf.h b/cpu/atmega2560/include/cpu-conf.h
index d5f9b0f9c13731438300c1157cf600975c970c7f..4e92af4c7ab432fd72b3ed1ee3b01d4774a6159e 100644
--- a/cpu/atmega2560/include/cpu-conf.h
+++ b/cpu/atmega2560/include/cpu-conf.h
@@ -20,6 +20,9 @@
#define __CPU_CONF_H
+#ifdef __cplusplus
+extern "C" {
+#endif
/**
* @name Kernel configuration
@@ -48,5 +51,9 @@
#endif
/** @} */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __CPU_CONF_H */
/** @} */
diff --git a/cpu/atmega2560/include/hwtimer_cpu.h b/cpu/atmega2560/include/hwtimer_cpu.h
index ed88022c03d1fa792f18272dc4a3a187349b23e0..8dc7dd8a11ccd023a397c692344eacc521708167 100644
--- a/cpu/atmega2560/include/hwtimer_cpu.h
+++ b/cpu/atmega2560/include/hwtimer_cpu.h
@@ -19,6 +19,10 @@
#ifndef __HWTIMER_CPU_H
#define __HWTIMER_CPU_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @name Hardware timer configuration
* @{
@@ -28,5 +32,9 @@
#define HWTIMER_MAXTICKS (0xFFFF) /**< 16-bit timer */
/** @} */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __HWTIMER_CPU_H */
/** @} */
diff --git a/cpu/atmega_common/avr-libc-extra/time.h b/cpu/atmega_common/avr-libc-extra/time.h
index 8cab93208ada273487d193a2c649adca413765a0..8dc096c382568924cc4ff042b10387982024a88d 100644
--- a/cpu/atmega_common/avr-libc-extra/time.h
+++ b/cpu/atmega_common/avr-libc-extra/time.h
@@ -101,13 +101,13 @@
#ifndef TIME_H
#define TIME_H
-#ifdef __cplusplus
-extern "C" {
-#endif
-
#include <inttypes.h>
#include <stdlib.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/** \ingroup avr_time */
/* @{ */
diff --git a/cpu/atmega_common/include/cpu.h b/cpu/atmega_common/include/cpu.h
index 4bae2e1b09c5e9633760b3ddea1841378e90372f..7716a869349e0ed9ab3e382f6b54d3eb2fdf2cc4 100644
--- a/cpu/atmega_common/include/cpu.h
+++ b/cpu/atmega_common/include/cpu.h
@@ -33,6 +33,11 @@
* TODO: remove once core was adjusted
*/
#include "irq.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define eINT enableIRQ
#define dINT disableIRQ
@@ -41,6 +46,9 @@
*/
void cpu_init(void);
+#ifdef __cplusplus
+}
+#endif
#endif /* __ATMEGA_COMMON_H */
/** @} */
diff --git a/cpu/atmega_common/include/sys/time.h b/cpu/atmega_common/include/sys/time.h
index db422d78fac66d19315270359c3a6377f2351787..2958d697f8c9f8d5bc7edd6eb50645cf747e1b8b 100644
--- a/cpu/atmega_common/include/sys/time.h
+++ b/cpu/atmega_common/include/sys/time.h
@@ -9,7 +9,15 @@
#include <sys/types.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
struct timeval {
time_t tv_sec;
suseconds_t tv_usec;
};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/cpu/atmega_common/include/sys/types.h b/cpu/atmega_common/include/sys/types.h
index 42b4c964f64c1e2598793101aa97de13e718d459..f3786cbdb7b7eda9d0781371629dd1958773db57 100644
--- a/cpu/atmega_common/include/sys/types.h
+++ b/cpu/atmega_common/include/sys/types.h
@@ -12,7 +12,15 @@
#ifndef AVR_TYPES_H
#define AVR_TYPES_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
typedef int16_t suseconds_t;
typedef signed int ssize_t;
+#ifdef __cplusplus
+}
+#endif
+
#endif /* ifndef AVR_TYPES_H */
diff --git a/cpu/cc430/include/cc430-adc.h b/cpu/cc430/include/cc430-adc.h
index 1e0e33f52ddb1fc08d8190604855bc6297dad889..cd01612da37d43b468169a5657d3bbdbd8b0267a 100644
--- a/cpu/cc430/include/cc430-adc.h
+++ b/cpu/cc430/include/cc430-adc.h
@@ -36,9 +36,17 @@
#ifndef CC430_ADC_H
#define CC430_ADC_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
extern uint16_t adc12_single_conversion(uint16_t ref, uint16_t sht, uint16_t channel);
extern uint16_t adc12_result;
extern uint8_t adc12_data_ready;
+#ifdef __cplusplus
+}
+#endif
+
#endif
diff --git a/cpu/cc430/include/cc430-rtc.h b/cpu/cc430/include/cc430-rtc.h
index 3fd9af7a89330c04af48ede2453e98c81c024398..ead80ecefbff69621c87ca6b5ac0fe0e42c765fe 100644
--- a/cpu/cc430/include/cc430-rtc.h
+++ b/cpu/cc430/include/cc430-rtc.h
@@ -11,6 +11,10 @@
#include "rtc.h"
#include "time.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @ingroup cc430
*/
@@ -52,5 +56,8 @@ void rtc_set_alarm(struct tm *localti, rtc_alarm_mask_t mask);
*/
void rtc_remove_alarm(void);
+#ifdef __cplusplus
+}
+#endif
#endif
diff --git a/cpu/cortex-m0_common/include/core_cm0.h b/cpu/cortex-m0_common/include/core_cm0.h
index 1b6b54ef44031fe87e3ebbf6350c7c3e58dc361d..cb809423ac99aaf86fae5ca0219bd74ae89b4dcb 100644
--- a/cpu/cortex-m0_common/include/core_cm0.h
+++ b/cpu/cortex-m0_common/include/core_cm0.h
@@ -123,10 +123,18 @@
#endif
#endif
+#ifdef __cplusplus
+}
+#endif
+
#include <stdint.h> /* standard types definitions */
#include <core_cmInstr.h> /* Core Instruction Access */
#include <core_cmFunc.h> /* Core Function Access */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#endif /* __CORE_CM0_H_GENERIC */
#ifndef __CMSIS_GENERIC
diff --git a/cpu/cortex-m0_common/include/core_cm0plus.h b/cpu/cortex-m0_common/include/core_cm0plus.h
index a135574debadf748aa6c203c323be47ab0bbd577..d948786fba33e3254b97342c459e81e6d31aa8b9 100644
--- a/cpu/cortex-m0_common/include/core_cm0plus.h
+++ b/cpu/cortex-m0_common/include/core_cm0plus.h
@@ -107,10 +107,18 @@
#endif
#endif
+#ifdef __cplusplus
+}
+#endif
+
#include <stdint.h> /* standard types definitions */
#include <core_cmInstr.h> /* Core Instruction Access */
#include <core_cmFunc.h> /* Core Function Access */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#endif /* __CORE_CM0PLUS_H_GENERIC */
#ifndef __CMSIS_GENERIC
diff --git a/cpu/cortex-m0_common/include/core_cmFunc.h b/cpu/cortex-m0_common/include/core_cmFunc.h
index b4495de3c723056ebcf806d44f1b8ecd9d94dee8..4da273e71af82cea4480e0d8fd5d2dd3ba799ff1 100644
--- a/cpu/cortex-m0_common/include/core_cmFunc.h
+++ b/cpu/cortex-m0_common/include/core_cmFunc.h
@@ -23,6 +23,9 @@
#ifndef __CORE_CMFUNC_H
#define __CORE_CMFUNC_H
+#ifdef __cplusplus
+extern "C" {
+#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
@@ -604,5 +607,8 @@ __attribute__( ( always_inline ) ) static __INLINE void __set_FPSCR(uint32_t fps
/*@} end of CMSIS_Core_RegAccFunctions */
+#ifdef __cplusplus
+}
+#endif
#endif /* __CORE_CMFUNC_H */
diff --git a/cpu/cortex-m0_common/include/core_cmInstr.h b/cpu/cortex-m0_common/include/core_cmInstr.h
index 40ec15e180b9350278f056aeeb8f6b4a6785edfc..267b43f89e6e6e5e3dd6030079cacd28f3e0aa15 100644
--- a/cpu/cortex-m0_common/include/core_cmInstr.h
+++ b/cpu/cortex-m0_common/include/core_cmInstr.h
@@ -23,6 +23,9 @@
#ifndef __CORE_CMINSTR_H
#define __CORE_CMINSTR_H
+#ifdef __cplusplus
+extern "C" {
+#endif
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
@@ -581,4 +584,8 @@ __attribute__( ( always_inline ) ) static __INLINE uint8_t __CLZ(uint32_t value)
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __CORE_CMINSTR_H */
diff --git a/cpu/cortex-m0_common/include/cpu.h b/cpu/cortex-m0_common/include/cpu.h
index 6f4e0c104847e79752b9285b3689cbc957623b57..824b8ec8cff1fe63a7537f267bd23f7ae1bb6409 100644
--- a/cpu/cortex-m0_common/include/cpu.h
+++ b/cpu/cortex-m0_common/include/cpu.h
@@ -33,6 +33,11 @@
* TODO: remove once core was adjusted
*/
#include "irq.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define eINT enableIRQ
#define dINT disableIRQ
@@ -41,5 +46,9 @@
*/
void cpu_init(void);
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __CPU_H */
/** @} */
diff --git a/cpu/cortex-m3_common/include/core_cm3.h b/cpu/cortex-m3_common/include/core_cm3.h
index 484909b53d7849cb111fcd0a28cfde1397a4e732..a7435ddff697b2ec392618d67c50aa08a481f739 100644
--- a/cpu/cortex-m3_common/include/core_cm3.h
+++ b/cpu/cortex-m3_common/include/core_cm3.h
@@ -117,10 +117,18 @@
/* add preprocessor checks */
#endif
+#ifdef __cplusplus
+}
+#endif
+
#include <stdint.h> /*!< standard types definitions */
#include "core_cmInstr.h" /*!< Core Instruction Access */
#include "core_cmFunc.h" /*!< Core Function Access */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#endif /* __CORE_CM3_H_GENERIC */
#ifndef __CMSIS_GENERIC
diff --git a/cpu/cortex-m3_common/include/core_cmFunc.h b/cpu/cortex-m3_common/include/core_cmFunc.h
index 85818e7b77b3aecb32ffce9c6a1f1633e152478f..df6c42a0ab0e3c559c8dc00475a3aa70b02851c1 100644
--- a/cpu/cortex-m3_common/include/core_cmFunc.h
+++ b/cpu/cortex-m3_common/include/core_cmFunc.h
@@ -23,6 +23,9 @@
#ifndef __CORE_CMFUNC_H
#define __CORE_CMFUNC_H
+#ifdef __cplusplus
+extern "C" {
+#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
@@ -604,5 +607,8 @@ __attribute__( ( always_inline ) ) static __INLINE void __set_FPSCR(uint32_t fps
/*@} end of CMSIS_Core_RegAccFunctions */
+#ifdef __cplusplus
+}
+#endif
#endif /* __CORE_CMFUNC_H */
diff --git a/cpu/cortex-m3_common/include/core_cmInstr.h b/cpu/cortex-m3_common/include/core_cmInstr.h
index 7163acd2ef8b06822730b6a0049ceeec1678a903..960aa760bdad1485f4e0235f429a4b4bea671556 100644
--- a/cpu/cortex-m3_common/include/core_cmInstr.h
+++ b/cpu/cortex-m3_common/include/core_cmInstr.h
@@ -23,6 +23,9 @@
#ifndef __CORE_CMINSTR_H
#define __CORE_CMINSTR_H
+#ifdef __cplusplus
+extern "C" {
+#endif
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
@@ -581,4 +584,8 @@ __attribute__( ( always_inline ) ) static __INLINE uint8_t __CLZ(uint32_t value)
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __CORE_CMINSTR_H */
diff --git a/cpu/cortex-m3_common/include/cpu.h b/cpu/cortex-m3_common/include/cpu.h
index d3155c0e0975a0af8792d53f71240e05e78e915f..8fe47d80d810c734a7fed7d3f98e7dbb05de0712 100644
--- a/cpu/cortex-m3_common/include/cpu.h
+++ b/cpu/cortex-m3_common/include/cpu.h
@@ -30,6 +30,11 @@
* TODO: remove once core was adjusted
*/
#include "irq.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define eINT enableIRQ
#define dINT disableIRQ
@@ -38,6 +43,9 @@
*/
void cpu_init(void);
+#ifdef __cplusplus
+}
+#endif
#endif /* __CORTEXM_COMMON_H */
/** @} */
diff --git a/cpu/cortex-m4_common/include/core_cm4.h b/cpu/cortex-m4_common/include/core_cm4.h
index 2c8b0882c34f7659d2b16ed7b8449adb854deba5..7be79022496fc820ccc92e62439a4519b0842071 100644
--- a/cpu/cortex-m4_common/include/core_cm4.h
+++ b/cpu/cortex-m4_common/include/core_cm4.h
@@ -165,11 +165,19 @@
#endif
#endif
+#ifdef __cplusplus
+}
+#endif
+
#include <stdint.h> /* standard types definitions */
#include <core_cmInstr.h> /* Core Instruction Access */
#include <core_cmFunc.h> /* Core Function Access */
#include <core_cm4_simd.h> /* Compiler specific SIMD Intrinsics */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#endif /* __CORE_CM4_H_GENERIC */
#ifndef __CMSIS_GENERIC
diff --git a/cpu/cortex-m4_common/include/core_cmFunc.h b/cpu/cortex-m4_common/include/core_cmFunc.h
index b4495de3c723056ebcf806d44f1b8ecd9d94dee8..4da273e71af82cea4480e0d8fd5d2dd3ba799ff1 100644
--- a/cpu/cortex-m4_common/include/core_cmFunc.h
+++ b/cpu/cortex-m4_common/include/core_cmFunc.h
@@ -23,6 +23,9 @@
#ifndef __CORE_CMFUNC_H
#define __CORE_CMFUNC_H
+#ifdef __cplusplus
+extern "C" {
+#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
@@ -604,5 +607,8 @@ __attribute__( ( always_inline ) ) static __INLINE void __set_FPSCR(uint32_t fps
/*@} end of CMSIS_Core_RegAccFunctions */
+#ifdef __cplusplus
+}
+#endif
#endif /* __CORE_CMFUNC_H */
diff --git a/cpu/cortex-m4_common/include/core_cmInstr.h b/cpu/cortex-m4_common/include/core_cmInstr.h
index 40ec15e180b9350278f056aeeb8f6b4a6785edfc..267b43f89e6e6e5e3dd6030079cacd28f3e0aa15 100644
--- a/cpu/cortex-m4_common/include/core_cmInstr.h
+++ b/cpu/cortex-m4_common/include/core_cmInstr.h
@@ -23,6 +23,9 @@
#ifndef __CORE_CMINSTR_H
#define __CORE_CMINSTR_H
+#ifdef __cplusplus
+extern "C" {
+#endif
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
@@ -581,4 +584,8 @@ __attribute__( ( always_inline ) ) static __INLINE uint8_t __CLZ(uint32_t value)
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __CORE_CMINSTR_H */
diff --git a/cpu/cortex-m4_common/include/cpu.h b/cpu/cortex-m4_common/include/cpu.h
index 3cb02b6d18f6ca669b9791c5c05dc88ea5ea8747..031e900c3cbfb802855b841fd9a287016769db36 100644
--- a/cpu/cortex-m4_common/include/cpu.h
+++ b/cpu/cortex-m4_common/include/cpu.h
@@ -32,6 +32,11 @@
* TODO: remove once core was adjusted
*/
#include "irq.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define eINT enableIRQ
#define dINT disableIRQ
@@ -40,5 +45,9 @@
*/
void cpu_init(void);
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __CORTEXM_COMMON_H */
/** @} */
diff --git a/cpu/lpc1768/include/LPC17xx.h b/cpu/lpc1768/include/LPC17xx.h
index 497e7a8e4b527e563b32a6946832a9ba6387b693..7c37e28a72f4aaf6e3af651dbec2e54862412d10 100644
--- a/cpu/lpc1768/include/LPC17xx.h
+++ b/cpu/lpc1768/include/LPC17xx.h
@@ -98,9 +98,15 @@ typedef enum IRQn
#define __NVIC_PRIO_BITS 5 /*!< Number of Bits used for Priority Levels */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
+#ifdef __cplusplus
+}
+#endif
#include "core_cm3.h" /* Cortex-M3 processor and core peripherals */
+#ifdef __cplusplus
+extern "C" {
+#endif
/******************************************************************************/
/* Device Specific Peripheral registers structures */
diff --git a/cpu/lpc2387/include/cpu-conf.h b/cpu/lpc2387/include/cpu-conf.h
index 60cfd7ef71d3fc53676474f7abf31b0dbc36c179..16745eb7439724cf171cd536eaceae58cf443cfd 100644
--- a/cpu/lpc2387/include/cpu-conf.h
+++ b/cpu/lpc2387/include/cpu-conf.h
@@ -10,6 +10,10 @@
#ifndef CPUCONF_H_
#define CPUCONF_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @ingroup conf
* @ingroup lpc2387
@@ -66,6 +70,9 @@
#define UART0_BUFSIZE (128)
#endif
+#ifdef __cplusplus
+}
+#endif
/** @} */
#endif /* CPUCONF_H_ */
diff --git a/cpu/lpc2387/include/cpu.h b/cpu/lpc2387/include/cpu.h
index b4d2565a1e3ad79889101f8ea078c3a362c4987b..5c7fcf417ad0146f661941261cfbc71334a72759 100644
--- a/cpu/lpc2387/include/cpu.h
+++ b/cpu/lpc2387/include/cpu.h
@@ -20,10 +20,18 @@
#include "lpc2387.h"
#include "arm_cpu.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
extern uintptr_t __stack_start; ///< end of user stack memory space
void lpc2387_pclk_scale(uint32_t source, uint32_t target, uint32_t *pclksel, uint32_t *prescale);
bool install_irq(int IntNumber, void (*HandlerAddr)(void), int Priority);
+#ifdef __cplusplus
+}
+#endif
+
/** @} */
#endif /* __CPU_H */
diff --git a/cpu/lpc2387/include/i2c.h b/cpu/lpc2387/include/i2c.h
index bbd4a61f256bc06f622d0455058946f0d5a404a8..c7e4aaaa65fcc39a9d295cddf9c086821f5f20ed 100644
--- a/cpu/lpc2387/include/i2c.h
+++ b/cpu/lpc2387/include/i2c.h
@@ -34,6 +34,10 @@
#include <stdbool.h>
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define I2C_BUFSIZE 0x23
#define MAX_TIMEOUT 0x00FFFFFF
@@ -326,4 +330,8 @@ void i2c_enable_pull_up_resistor(uint8_t i2c_interface);
*/
void i2c_disable_pull_up_resistor(uint8_t i2c_interface);
+#ifdef __cplusplus
+}
+#endif
+
#endif /* end __I2C_H */
diff --git a/cpu/lpc2387/include/lpc2387-adc.h b/cpu/lpc2387/include/lpc2387-adc.h
index 9de97e31023f2e3bf234b36e31538da35bb5d794..7c289d5cefaa199eca3dc5ff489ad591bce5eb4c 100644
--- a/cpu/lpc2387/include/lpc2387-adc.h
+++ b/cpu/lpc2387/include/lpc2387-adc.h
@@ -29,6 +29,10 @@
#include <stdint.h>
#include "adc_legacy.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define ADC_NUM (6)
#define ADC_OFFSET (0x10)
#define ADC_INDEX (4)
@@ -42,5 +46,9 @@
void adc_init_1(void);
void adc_init_2(void);
+#ifdef __cplusplus
+}
+#endif
+
/** @} */
#endif /* LPC2387ADC_H_ */
diff --git a/cpu/lpc2387/include/lpc2387-rtc.h b/cpu/lpc2387/include/lpc2387-rtc.h
index 71da66ba6998a38bdf9f03ca90c7fed84b9caba5..d0ca6f8d51e03662465e57b1597e72cdeb0e1eb5 100644
--- a/cpu/lpc2387/include/lpc2387-rtc.h
+++ b/cpu/lpc2387/include/lpc2387-rtc.h
@@ -35,6 +35,10 @@
#include "rtc.h"
#include "lpc2387.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ------------------------------------------------------------------------- */
/**
* @name LPC2387 RTC Compile-Time Configuration
@@ -104,5 +108,9 @@ void rtc_set_alarm(struct tm *localt, enum rtc_alarm_mask mask);
*/
enum rtc_alarm_mask _rtc_get_alarm(struct tm *localt);
+#ifdef __cplusplus
+}
+#endif
+
/** @} */
#endif /* end __RTC_H */
diff --git a/cpu/lpc2387/include/lpc2387.h b/cpu/lpc2387/include/lpc2387.h
index 4e3c651a0d45faef020b20d5e2bdbcb5115dca75..d9ddfc840ff446c2962f119eaa27fe7e2ec649ac 100644
--- a/cpu/lpc2387/include/lpc2387.h
+++ b/cpu/lpc2387/include/lpc2387.h
@@ -14,6 +14,10 @@
#include "lpc23xx.h"
#include "bitarithm.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define F_CCO 288000000
#define CL_CPU_DIV 4 ///< CPU clock divider
#define F_CPU (F_CCO / CL_CPU_DIV) ///< CPU target speed in Hz
@@ -208,4 +212,8 @@
/** @} */
/** @} */
+#ifdef __cplusplus
+}
+#endif
+
#endif // __LPC2387_H
diff --git a/cpu/lpc2387/include/lpc23xx.h b/cpu/lpc2387/include/lpc23xx.h
index b1d1c019e5d34e44f9ce4346adab97f727e8a21a..b6de1a990f872c165b9cbae880d39ff328c1ce39 100644
--- a/cpu/lpc2387/include/lpc23xx.h
+++ b/cpu/lpc2387/include/lpc23xx.h
@@ -15,6 +15,10 @@
#ifndef __LPC23xx_H
#define __LPC23xx_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* Vectored Interrupt Controller (VIC) */
#define VIC_BASE_ADDR 0xFFFFF000
#define VICIRQStatus (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x000))
@@ -1126,5 +1130,8 @@ with the spec. update in USB Device Section. */
#define MAC_POWERDOWN (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFF4)) /* Power-down reg */
#define MAC_MODULEID (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */
+#ifdef __cplusplus
+}
+#endif
#endif // __LPC23xx_H
diff --git a/cpu/mc1322x/asm/include/asm.h b/cpu/mc1322x/asm/include/asm.h
index 07a1fcfdec63f8bc12ef682a30ae32ff7a7fcbfb..db69eef9ce7b34973c5016cbacfe8040c0ac0dee 100644
--- a/cpu/mc1322x/asm/include/asm.h
+++ b/cpu/mc1322x/asm/include/asm.h
@@ -12,6 +12,10 @@
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define ASM_BASE_ADDRESS 0x80008000
struct ASM_struct {
@@ -100,4 +104,8 @@ void asm_ctr_cbc_mac_init(asm_keys_t *keys);
void asm_ctr_cbc_mac_update(asm_data_t *data, asm_ctr_t *ctr);
void asm_ctr_cbc_mac_finish(asm_data_t *data);
+#ifdef __cplusplus
+}
+#endif
+
#endif /* ASM_H */
diff --git a/cpu/mc1322x/include/cpu-conf.h b/cpu/mc1322x/include/cpu-conf.h
index 70737d62bd9ecc79be939256280504317e4fe654..28c966f1b5a3cb3d023ef2d9a0118304506c7134 100644
--- a/cpu/mc1322x/include/cpu-conf.h
+++ b/cpu/mc1322x/include/cpu-conf.h
@@ -10,6 +10,10 @@
#ifndef CPUCONF_H_
#define CPUCONF_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @ingroup conf
* @ingroup mc1322x
@@ -63,5 +67,9 @@
#define UART0_BUFSIZE (64)
#endif
+#ifdef __cplusplus
+}
+#endif
+
/** @} */
#endif /* CPUCONF_H_ */
diff --git a/cpu/mc1322x/include/cpu.h b/cpu/mc1322x/include/cpu.h
index 8e27c7a870f9775fb605963a5fc78d721f4ec18f..cb1f9bafcced69f56f172e9d8420b79db6da3960 100644
--- a/cpu/mc1322x/include/cpu.h
+++ b/cpu/mc1322x/include/cpu.h
@@ -26,8 +26,16 @@
#include "arm_cpu.h"
#include "mc1322x.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
extern uintptr_t __stack_start; ///< end of user stack memory space
bool install_irq(int int_number, void *handler_addr, int priority);
+#ifdef __cplusplus
+}
+#endif
+
/** @} */
#endif /* CPU_H */
diff --git a/cpu/mc1322x/include/gpio.h b/cpu/mc1322x/include/gpio.h
index 26cd66a23914de2407a0526e7c8a9c337c12de9a..ec022b150efe81797670003d626be36b2acf6fb5 100644
--- a/cpu/mc1322x/include/gpio.h
+++ b/cpu/mc1322x/include/gpio.h
@@ -13,6 +13,10 @@
// TODO: why do we need to include this for macro expansion?
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* Structure-based GPIO access
Example usage:
@@ -155,4 +159,8 @@ enum { _REP(0,0) };
static volatile struct GPIO_struct * const GPIO = (void *) (0x80000000);
+#ifdef __cplusplus
+}
+#endif
+
#endif
diff --git a/cpu/mc1322x/include/mc1322x.h b/cpu/mc1322x/include/mc1322x.h
index 5b794a3d6b908fea8819d13340ea06913ba1bd5e..82003d0268c6b576fffb450a49b3ad8798aeb999 100644
--- a/cpu/mc1322x/include/mc1322x.h
+++ b/cpu/mc1322x/include/mc1322x.h
@@ -12,6 +12,10 @@
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*-----------------------------------------------------------------*/
/* System Management */
#define SW_RST_VAL (0x87651234)
@@ -303,8 +307,6 @@ static volatile struct TMR_struct * const TMR3 = (void *) (TMR3_BASE);
/* Interrupts */
#define INTBASE (0x80020000)
-#include <stdint.h>
-
/* Structure-based ITC access */
#define __INTERRUPT_union(x) \
union { \
@@ -442,4 +444,8 @@ extern void adc_isr(void) __attribute__((weak));
extern void spi_isr(void) __attribute__((weak));
+#ifdef __cplusplus
+}
+#endif
+
#endif /* MC1322X_H */
diff --git a/cpu/mc1322x/maca/include/maca.h b/cpu/mc1322x/maca/include/maca.h
index 6b788d911d035b3b7eccfa5d67668f62055add7f..c296438238672a45dd23f1b7c44bd7b1c83c46e3 100644
--- a/cpu/mc1322x/maca/include/maca.h
+++ b/cpu/mc1322x/maca/include/maca.h
@@ -15,6 +15,10 @@
#include "maca_packet.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*********************************************************/
/* function definitions */
/*********************************************************/
@@ -530,5 +534,8 @@ static volatile struct MACA_struct * const MACA = (void *) (MACA_BASE_ADDRESS +
#define MACA_TMRDIS_SFTOFF_ABORT 1
+#ifdef __cplusplus
+}
+#endif
#endif // MACA_H_
diff --git a/cpu/mc1322x/maca/include/maca_packet.h b/cpu/mc1322x/maca/include/maca_packet.h
index c1429c253a7538ae7366d6d94de3979b9260ff1f..092a93c8ecd2af6d950efaea6ebd0d6b460bb64f 100644
--- a/cpu/mc1322x/maca/include/maca_packet.h
+++ b/cpu/mc1322x/maca/include/maca_packet.h
@@ -12,6 +12,10 @@
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* does not include 2 byte FCS checksum */
#ifndef MACA_MAX_PAYLOAD_SIZE
#define MACA_MAX_PAYLOAD_SIZE 125
@@ -40,4 +44,8 @@ struct packet {
};
typedef struct packet maca_packet_t;
+#ifdef __cplusplus
+}
+#endif
+
#endif
diff --git a/cpu/msp430-common/include/cpu-conf.h b/cpu/msp430-common/include/cpu-conf.h
index 8ca97d1113d8ec0288505e7ac27b993efa2cd03f..5a86a00438a9dabea2d34abdc20bc4ce88582c88 100644
--- a/cpu/msp430-common/include/cpu-conf.h
+++ b/cpu/msp430-common/include/cpu-conf.h
@@ -9,6 +9,10 @@
#ifndef CPUCONF_H_
#define CPUCONF_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @name Kernel configuration
* @{
@@ -36,4 +40,8 @@
#endif
/** @} */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* CPUCONF_H_ */
diff --git a/cpu/msp430-common/include/cpu.h b/cpu/msp430-common/include/cpu.h
index c2c8fef26923c61e15e0756a250af76c9b05c57e..8611bb2cd41830b7c4c18d11a23586ee4d3d353e 100644
--- a/cpu/msp430-common/include/cpu.h
+++ b/cpu/msp430-common/include/cpu.h
@@ -31,6 +31,10 @@
#include "msp430_types.h"
#include "cpu-conf.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define WORDSIZE 16
extern volatile int __inISR;
@@ -135,5 +139,9 @@ int inISR(void);
void msp430_cpu_init(void);
+#ifdef __cplusplus
+}
+#endif
+
/** @} */
#endif // _CPU_H
diff --git a/cpu/msp430-common/include/hwtimer_cpu.h b/cpu/msp430-common/include/hwtimer_cpu.h
index 934d21951580a020bf5b63173347642e9071164f..0aed689a2d8c3700dc8ffe2a6c7f92117a5a6420 100644
--- a/cpu/msp430-common/include/hwtimer_cpu.h
+++ b/cpu/msp430-common/include/hwtimer_cpu.h
@@ -13,6 +13,10 @@
#include "cpu.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#ifdef __MSP430_HAS_TA2__
#define HWTIMER_MAXTIMERS 2
#endif
@@ -32,4 +36,8 @@
#define HWTIMER_SPEED (F_RC_OSCILLATOR)
#define HWTIMER_MAXTICKS (0xFFFFFFFF)
+#ifdef __cplusplus
+}
+#endif
+
#endif // __HWTIMER_CPU_H
diff --git a/cpu/msp430-common/include/msp430_types.h b/cpu/msp430-common/include/msp430_types.h
index 839bfd5cb6c976e35d6ac9f0fbc35c8f008c1eb6..9bd0840f6a0ae493227fc9d7b095854a35ceed0b 100644
--- a/cpu/msp430-common/include/msp430_types.h
+++ b/cpu/msp430-common/include/msp430_types.h
@@ -15,6 +15,10 @@
/** defining signed type for size_t */
#include "kernel_types.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#ifndef EINVAL
/**
* @brief defines EINVAL if MSP430 toolchain is too old to provide it itself
@@ -47,4 +51,8 @@ struct timeval {
/* TODO: remove once msp430 libc supports clockid_t */
typedef int clockid_t;
+#ifdef __cplusplus
+}
+#endif
+
#endif /* MSP430_TYPES_H */
diff --git a/cpu/msp430-common/include/sys/time.h b/cpu/msp430-common/include/sys/time.h
index 5bd63aed7be039a537402a83d59ab655a4894804..9b0e16573a155ca473b375840c414c3c8e750f2d 100644
--- a/cpu/msp430-common/include/sys/time.h
+++ b/cpu/msp430-common/include/sys/time.h
@@ -11,4 +11,12 @@
#include "msp430_types.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
#endif /* TIME_H */
diff --git a/cpu/msp430-common/include/time.h b/cpu/msp430-common/include/time.h
index 6eaf10ab73b563d9b7c9a556ace9eeba63131bfb..a2479934e3e001ce42d1f1c1017c5a6a3301526a 100644
--- a/cpu/msp430-common/include/time.h
+++ b/cpu/msp430-common/include/time.h
@@ -9,6 +9,10 @@
#ifndef MSPGCC_TIME_H
#define MSPGCC_TIME_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
struct tm {
int tm_sec; /* Seconds after the minute [0, 60] */
int tm_min; /* Minutes after the hour [0, 59] */
@@ -21,4 +25,8 @@ struct tm {
int tm_isdst; /* Daylight saving time is in effect */
};
+#ifdef __cplusplus
+}
+#endif
+
#endif
diff --git a/cpu/native/include/clang_compat.h b/cpu/native/include/clang_compat.h
index 95faa4440399900217ed9819827770f4776ba572..1459d3a16b44db2c0046375964c9ffe38a8c0c7e 100644
--- a/cpu/native/include/clang_compat.h
+++ b/cpu/native/include/clang_compat.h
@@ -10,6 +10,10 @@
#ifndef __CLANG_COMPAT_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#undef HTONS
#undef HTONL
#undef HTONLL
@@ -17,4 +21,8 @@
#undef NTOHL
#undef NTOHLL
+#ifdef __cplusplus
+}
+#endif
+
#endif
diff --git a/cpu/native/include/cpu-conf.h b/cpu/native/include/cpu-conf.h
index b9d580da2d48e32cd4fc8a905ed9511dc9d25944..3cf26d05e66c72c83d9d6eca47ca3ba952a6c5e5 100644
--- a/cpu/native/include/cpu-conf.h
+++ b/cpu/native/include/cpu-conf.h
@@ -16,6 +16,10 @@
#ifndef CPUCONF_H_
#define CPUCONF_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* TODO: tighten stack sizes */
#ifdef __MACH__ /* OSX */
#define KERNEL_CONF_STACKSIZE_DEFAULT (163840)
@@ -64,4 +68,8 @@
#define CPUID_ID_LEN (4)
#endif
+#ifdef __cplusplus
+}
+#endif
+
#endif /* CPUCONF_H_ */
diff --git a/cpu/native/include/cpu.h b/cpu/native/include/cpu.h
index 14be112dbe394fe51a4c4ac26c8157afe2a1be7a..734a09e8d2cccd3b1ecff60bc5402d47647ddc98 100644
--- a/cpu/native/include/cpu.h
+++ b/cpu/native/include/cpu.h
@@ -20,9 +20,17 @@
#ifndef _CPU_H
#define _CPU_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* TODO: remove once these have been removed from RIOT: */
void dINT(void);
void eINT(void);
+#ifdef __cplusplus
+}
+#endif
+
/** @} */
#endif //_CPU_H
diff --git a/cpu/native/include/hwtimer_cpu.h b/cpu/native/include/hwtimer_cpu.h
index ea9c7e630929453f3bf20add6e132469aee455d8..5960884d02773887a0ced9258e5c908fa24cfcde 100644
--- a/cpu/native/include/hwtimer_cpu.h
+++ b/cpu/native/include/hwtimer_cpu.h
@@ -17,8 +17,16 @@
#ifndef HWTIMER_CPU_H_
#define HWTIMER_CPU_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define HWTIMER_MAXTIMERS 4
#define HWTIMER_SPEED 1000000
#define HWTIMER_MAXTICKS (0xFFFFFFFF)
+#ifdef __cplusplus
+}
+#endif
+
#endif /* HWTIMER_CPU_H_ */
diff --git a/cpu/native/include/native_internal.h b/cpu/native/include/native_internal.h
index 2bbfc5746d17148b1e8ea3d355deb12e63682498..edc3c46e4df23ee72c738db1f76363e6e90ecd08 100644
--- a/cpu/native/include/native_internal.h
+++ b/cpu/native/include/native_internal.h
@@ -47,6 +47,9 @@
#include "kernel_types.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
/**
* Prototype for native's internal callbacks
@@ -146,6 +149,10 @@ int unregister_interrupt(int sig);
//#include <sys/param.h>
+#ifdef __cplusplus
+}
+#endif
+
#include "kernel_internal.h"
#include "sched.h"
diff --git a/cpu/native/include/nativenet.h b/cpu/native/include/nativenet.h
index e4d462c7879ad274db178359765bff43068da69f..d7909fc0745f5fa6c3e7bedf076018abeb4420c6 100644
--- a/cpu/native/include/nativenet.h
+++ b/cpu/native/include/nativenet.h
@@ -42,6 +42,11 @@
#ifndef NATIVE_MAX_DATA_LENGTH
#include "tap.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#ifdef MODULE_SIXLOWPAN
#define NATIVE_MAX_DATA_LENGTH (127)
#else
@@ -155,5 +160,10 @@ uint16_t nativenet_get_pan(void);
* Enable transceiver rx mode
*/
void nativenet_switch_to_rx(void);
+
+#ifdef __cplusplus
+}
+#endif
+
/** @} */
#endif /* NATIVENET_H */
diff --git a/cpu/native/include/nativenet_internal.h b/cpu/native/include/nativenet_internal.h
index 4e10c8c065555e0808b0e582fea27f7677f1887f..04a072d5cb2ab4e2836c8725d4b6777531c43d7e 100644
--- a/cpu/native/include/nativenet_internal.h
+++ b/cpu/native/include/nativenet_internal.h
@@ -19,6 +19,10 @@
#include "tap.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define NNEV_PWRDWN 0x01
#define NNEV_PWRUP 0x02
#define NNEV_MONITOR 0x03
@@ -97,4 +101,9 @@ extern _nativenet_netdev_more_t _nativenet_default_dev_more;
void _nativenet_handle_packet(radio_packet_t *packet);
int8_t send_buf(radio_packet_t *packet);
+
+#ifdef __cplusplus
+}
+#endif
+
#endif /* NATIVENET_INTERNAL_H */
diff --git a/cpu/native/include/tap.h b/cpu/native/include/tap.h
index 662d6234848df232ab0648b958edee836ba780c4..0d44548dcca05eee26620743dcd99b9df5675bda 100644
--- a/cpu/native/include/tap.h
+++ b/cpu/native/include/tap.h
@@ -21,6 +21,10 @@
#include "board.h"
#include "radio/types.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* create and/or open tap device "name"
*
@@ -55,4 +59,8 @@ union eth_frame {
unsigned char buffer[ETHER_MAX_LEN];
} __attribute__((packed));
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _TAP_H */
diff --git a/cpu/nrf51822/include/cpu-conf.h b/cpu/nrf51822/include/cpu-conf.h
index 0765828c67149b2e48179762e7967d9738dd3c87..51cbd3bbbd624963539ad7449ae624c151085c3e 100644
--- a/cpu/nrf51822/include/cpu-conf.h
+++ b/cpu/nrf51822/include/cpu-conf.h
@@ -22,6 +22,10 @@
#include "nrf51.h"
#include "nrf51_bitfields.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @name Kernel configuration
* @{
@@ -51,5 +55,9 @@
*/
#define CPUID_ID_LEN (8)
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __CPU_CONF_H */
/** @} */
diff --git a/cpu/nrf51822/include/hwtimer_cpu.h b/cpu/nrf51822/include/hwtimer_cpu.h
index 75c085b58a0a1dab4c4fb68ea90646517ab15f64..428521f859b1ebf7546f57611eb6d7ba3795e85a 100644
--- a/cpu/nrf51822/include/hwtimer_cpu.h
+++ b/cpu/nrf51822/include/hwtimer_cpu.h
@@ -19,6 +19,10 @@
#ifndef __HWTIMER_CPU_H
#define __HWTIMER_CPU_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @name Hardware timer configuration
* @{
@@ -29,6 +33,9 @@
#define HWTIMER_MAXTICKS (0xFFFFFF) /**< 24-bit timer -> see PAN note */
/** @} */
+#ifdef __cplusplus
+}
+#endif
#endif /* __HWTIMER_CPU_H */
/** @} */
diff --git a/cpu/nrf51822/include/nrf51.h b/cpu/nrf51822/include/nrf51.h
index cb7fedfc4fa2c91a599d408b20cbdb9a5a94b478..ebd6ec0567dcd7c15b25393f2874aee48ab83c71 100644
--- a/cpu/nrf51822/include/nrf51.h
+++ b/cpu/nrf51822/include/nrf51.h
@@ -116,8 +116,15 @@ typedef enum {
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
/** @} */ /* End of group Configuration_of_CMSIS */
+#ifdef __cplusplus
+}
+#endif
+
#include <core_cm0.h> /*!< Cortex-M0 processor and core peripherals */
+#ifdef __cplusplus
+extern "C" {
+#endif
/* ================================================================================ */
/* ================ Device Specific Peripheral Section ================ */
diff --git a/cpu/nrf51822/include/nrf51_bitfields.h b/cpu/nrf51822/include/nrf51_bitfields.h
index 75ed114e7a0984336adafdfded3366aafb1cec18..25c9b5b889de8b153ab96962b847e0a424c6c617 100644
--- a/cpu/nrf51822/include/nrf51_bitfields.h
+++ b/cpu/nrf51822/include/nrf51_bitfields.h
@@ -34,6 +34,10 @@
#include <core_cm0.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* Peripheral: AAR */
/* Description: Accelerated Address Resolver. */
@@ -6889,6 +6893,9 @@
#define WDT_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */
#define WDT_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */
+#ifdef __cplusplus
+}
+#endif
/*lint --flb "Leave library region" */
#endif
diff --git a/cpu/sam3x8e/include/component/component_adc.h b/cpu/sam3x8e/include/component/component_adc.h
index 7921ea6fe5a82d7b2d537c0a7ae5852e1cf9d3e5..f8446e731a4f2bbaab03bfe6585d8ed44c8980a4 100644
--- a/cpu/sam3x8e/include/component/component_adc.h
+++ b/cpu/sam3x8e/include/component/component_adc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_ADC_COMPONENT_
#define _SAM3XA_ADC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Analog-to-digital Converter */
/* ============================================================================= */
@@ -501,5 +505,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_ADC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_can.h b/cpu/sam3x8e/include/component/component_can.h
index 547e875a1e8e57f2020988d059e8ccf70c41d9df..043068371624a2d8c36e752565d2af91e1f1b70d 100644
--- a/cpu/sam3x8e/include/component/component_can.h
+++ b/cpu/sam3x8e/include/component/component_can.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_CAN_COMPONENT_
#define _SAM3XA_CAN_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Controller Area Network */
/* ============================================================================= */
@@ -295,5 +299,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_CAN_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_chipid.h b/cpu/sam3x8e/include/component/component_chipid.h
index 30f9aa667b74b1c7b2e8ba5a839456f8508fec6b..afa8b83689f01223a5decad263e1820a8cd1abf8 100644
--- a/cpu/sam3x8e/include/component/component_chipid.h
+++ b/cpu/sam3x8e/include/component/component_chipid.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_CHIPID_COMPONENT_
#define _SAM3XA_CHIPID_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Chip Identifier */
/* ============================================================================= */
@@ -156,5 +160,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_CHIPID_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_dacc.h b/cpu/sam3x8e/include/component/component_dacc.h
index 59e93a89918c104de6cd8f4e1fbae1fd24ca09b7..5200cb9ce323c8b02c0c6f30cdd153dd0947f510 100644
--- a/cpu/sam3x8e/include/component/component_dacc.h
+++ b/cpu/sam3x8e/include/component/component_dacc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_DACC_COMPONENT_
#define _SAM3XA_DACC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Digital-to-Analog Converter Controller */
/* ============================================================================= */
@@ -207,5 +211,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_DACC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_dmac.h b/cpu/sam3x8e/include/component/component_dmac.h
index 0549f8f90aa59525d33268fb5dc3c9c4f8471a06..bd022eb0758bd68f73afe7c56ad94b8183a39ce2 100644
--- a/cpu/sam3x8e/include/component/component_dmac.h
+++ b/cpu/sam3x8e/include/component/component_dmac.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_DMAC_COMPONENT_
#define _SAM3XA_DMAC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR DMA Controller */
/* ============================================================================= */
@@ -364,5 +368,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_DMAC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_efc.h b/cpu/sam3x8e/include/component/component_efc.h
index bcc61619805354dd543c6a322e5b6987ca3bc959..7843dd15b15b410a4441dcd7937a47831fad10e1 100644
--- a/cpu/sam3x8e/include/component/component_efc.h
+++ b/cpu/sam3x8e/include/component/component_efc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_EFC_COMPONENT_
#define _SAM3XA_EFC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Embedded Flash Controller */
/* ============================================================================= */
@@ -73,5 +77,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_EFC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_emac.h b/cpu/sam3x8e/include/component/component_emac.h
index b3325aefd44eba563d646497500cc29f0a8934c2..d609545839e46b292604b8f465f20032a9e54f78 100644
--- a/cpu/sam3x8e/include/component/component_emac.h
+++ b/cpu/sam3x8e/include/component/component_emac.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_EMAC_COMPONENT_
#define _SAM3XA_EMAC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Ethernet MAC 10/100 */
/* ============================================================================= */
@@ -332,5 +336,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_EMAC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_gpbr.h b/cpu/sam3x8e/include/component/component_gpbr.h
index 8c75f6156999ee4347d9aa7ddab52681f2f6b6b1..d66cbbe2da2023933ea7e671a0d4f48ba45c290a 100644
--- a/cpu/sam3x8e/include/component/component_gpbr.h
+++ b/cpu/sam3x8e/include/component/component_gpbr.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_GPBR_COMPONENT_
#define _SAM3XA_GPBR_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR General Purpose Backup Register */
/* ============================================================================= */
@@ -50,5 +54,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_GPBR_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_hsmci.h b/cpu/sam3x8e/include/component/component_hsmci.h
index 084ed9db4a02e5058a9ba07b8c48ea52d18af943..2d9f4d28cde713c6a3fd518ec6d339545afd1c8a 100644
--- a/cpu/sam3x8e/include/component/component_hsmci.h
+++ b/cpu/sam3x8e/include/component/component_hsmci.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_HSMCI_COMPONENT_
#define _SAM3XA_HSMCI_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR High Speed MultiMedia Card Interface */
/* ============================================================================= */
@@ -338,5 +342,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_HSMCI_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_matrix.h b/cpu/sam3x8e/include/component/component_matrix.h
index bc18f55260d24f3b637d49900c0793ff55bcc773..970e7ad6c7387d8494d8f423198240876dd10ecf 100644
--- a/cpu/sam3x8e/include/component/component_matrix.h
+++ b/cpu/sam3x8e/include/component/component_matrix.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_MATRIX_COMPONENT_
#define _SAM3XA_MATRIX_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR AHB Bus Matrix */
/* ============================================================================= */
@@ -282,5 +286,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_MATRIX_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_pdc.h b/cpu/sam3x8e/include/component/component_pdc.h
index b497b437a03dc7ee096592ea3e7db9fdb15813d0..a67016ff362efbc26407e218064a0eb51a1d8397 100644
--- a/cpu/sam3x8e/include/component/component_pdc.h
+++ b/cpu/sam3x8e/include/component/component_pdc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_PDC_COMPONENT_
#define _SAM3XA_PDC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Peripheral DMA Controller */
/* ============================================================================= */
@@ -95,5 +99,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_PDC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_pio.h b/cpu/sam3x8e/include/component/component_pio.h
index 4a2453af26666cd8e473237c693af2311ed51fd8..3c056b26c08dc987664ca432b5977922779c2f79 100644
--- a/cpu/sam3x8e/include/component/component_pio.h
+++ b/cpu/sam3x8e/include/component/component_pio.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_PIO_COMPONENT_
#define _SAM3XA_PIO_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Parallel Input/Output Controller */
/* ============================================================================= */
@@ -1432,5 +1436,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_PIO_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_pmc.h b/cpu/sam3x8e/include/component/component_pmc.h
index b75c031e973beb590bb814655ae8635c6522b5e3..02fa575bf274bf15e91e66462061183cef3b75a9 100644
--- a/cpu/sam3x8e/include/component/component_pmc.h
+++ b/cpu/sam3x8e/include/component/component_pmc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_PMC_COMPONENT_
#define _SAM3XA_PMC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Power Management Controller */
/* ============================================================================= */
@@ -413,5 +417,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_PMC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_pwm.h b/cpu/sam3x8e/include/component/component_pwm.h
index 6e5e37f1d2769568ace718e133bd138d3b2a40fe..83958e880e7faea2ba69f0e179d9feadceccef3a 100644
--- a/cpu/sam3x8e/include/component/component_pwm.h
+++ b/cpu/sam3x8e/include/component/component_pwm.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_PWM_COMPONENT_
#define _SAM3XA_PWM_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Pulse Width Modulation Controller */
/* ============================================================================= */
@@ -664,5 +668,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_PWM_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_rstc.h b/cpu/sam3x8e/include/component/component_rstc.h
index 16f5a39428deb793a057959edce39d5bcf98dd61..c9c103b9552bd9e94b0a899eca4780f6db76bbd0 100644
--- a/cpu/sam3x8e/include/component/component_rstc.h
+++ b/cpu/sam3x8e/include/component/component_rstc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_RSTC_COMPONENT_
#define _SAM3XA_RSTC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Reset Controller */
/* ============================================================================= */
@@ -70,5 +74,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_RSTC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_rtc.h b/cpu/sam3x8e/include/component/component_rtc.h
index cd56f8344acba7cf7f65d8edb80ab6b71bcafe85..307dc868ce18782c1f08c581ac3a9cadf4dc1bf9 100644
--- a/cpu/sam3x8e/include/component/component_rtc.h
+++ b/cpu/sam3x8e/include/component/component_rtc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_RTC_COMPONENT_
#define _SAM3XA_RTC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Real-time Clock */
/* ============================================================================= */
@@ -165,5 +169,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_RTC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_rtt.h b/cpu/sam3x8e/include/component/component_rtt.h
index 9f6a8a1c5609b2abfafccd298ed14250b5b95c26..40200d9adf58d7a40dbb8d4d9d5ffdebfdbbc996 100644
--- a/cpu/sam3x8e/include/component/component_rtt.h
+++ b/cpu/sam3x8e/include/component/component_rtt.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_RTT_COMPONENT_
#define _SAM3XA_RTT_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Real-time Timer */
/* ============================================================================= */
@@ -66,5 +70,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_RTT_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_sdramc.h b/cpu/sam3x8e/include/component/component_sdramc.h
index 41c8d83f9806c2edbefc9ec440452a950d61480d..2d53882b4a8098f3d429041ec1de17c9e7c13fbf 100644
--- a/cpu/sam3x8e/include/component/component_sdramc.h
+++ b/cpu/sam3x8e/include/component/component_sdramc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_SDRAMC_COMPONENT_
#define _SAM3XA_SDRAMC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR SDRAM Controller */
/* ============================================================================= */
@@ -185,5 +189,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_SDRAMC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_smc.h b/cpu/sam3x8e/include/component/component_smc.h
index 9d60410444fff4520c23289b097f71e6b99c5d64..d6f15314f907a950933c63a09ec8e7011d433fce 100644
--- a/cpu/sam3x8e/include/component/component_smc.h
+++ b/cpu/sam3x8e/include/component/component_smc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_SMC_COMPONENT_
#define _SAM3XA_SMC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Static Memory Controller */
/* ============================================================================= */
@@ -481,5 +485,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_SMC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_spi.h b/cpu/sam3x8e/include/component/component_spi.h
index f52009bb1210506e28455fdb0f19a5579ee80db9..d2c189c2042552c09d7bbc7666c9fec91bc51600 100644
--- a/cpu/sam3x8e/include/component/component_spi.h
+++ b/cpu/sam3x8e/include/component/component_spi.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_SPI_COMPONENT_
#define _SAM3XA_SPI_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Serial Peripheral Interface */
/* ============================================================================= */
@@ -156,5 +160,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_SPI_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_ssc.h b/cpu/sam3x8e/include/component/component_ssc.h
index 87730406cd464014c3a6a18a1169473afbaeb91b..ed6f939ce8bad45d8e6e98a73dc3459fd73b0715 100644
--- a/cpu/sam3x8e/include/component/component_ssc.h
+++ b/cpu/sam3x8e/include/component/component_ssc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_SSC_COMPONENT_
#define _SAM3XA_SSC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Synchronous Serial Controller */
/* ============================================================================= */
@@ -267,5 +271,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_SSC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_supc.h b/cpu/sam3x8e/include/component/component_supc.h
index ce8b126ff9ac62fbc9c8da4efd0d39e99234456e..a5d5093446ab72a4cf994a550f4c938d4a8f51c1 100644
--- a/cpu/sam3x8e/include/component/component_supc.h
+++ b/cpu/sam3x8e/include/component/component_supc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_SUPC_COMPONENT_
#define _SAM3XA_SUPC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Supply Controller */
/* ============================================================================= */
@@ -309,5 +313,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_SUPC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_tc.h b/cpu/sam3x8e/include/component/component_tc.h
index 6feae004b7728a8547a011a26dccc05aaf37fc67..d40dfdf720b13d7ffc15f2827f19f62735bac8ca 100644
--- a/cpu/sam3x8e/include/component/component_tc.h
+++ b/cpu/sam3x8e/include/component/component_tc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_TC_COMPONENT_
#define _SAM3XA_TC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Timer Counter */
/* ============================================================================= */
@@ -300,5 +304,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_TC_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_trng.h b/cpu/sam3x8e/include/component/component_trng.h
index ec59ccb01dd92793c231bfb0985a72b8ed7df91c..cb89d342b98100a242f68cac7791cc7fc993f079 100644
--- a/cpu/sam3x8e/include/component/component_trng.h
+++ b/cpu/sam3x8e/include/component/component_trng.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_TRNG_COMPONENT_
#define _SAM3XA_TRNG_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR True Random Number Generator */
/* ============================================================================= */
@@ -69,5 +73,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_TRNG_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_twi.h b/cpu/sam3x8e/include/component/component_twi.h
index 03bb3d3af93abe8b9ea00d71c09e3c51f90e12bc..f5b8e59216944a68e4b14e6d31e1aeb9f23473b7 100644
--- a/cpu/sam3x8e/include/component/component_twi.h
+++ b/cpu/sam3x8e/include/component/component_twi.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_TWI_COMPONENT_
#define _SAM3XA_TWI_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Two-wire Interface */
/* ============================================================================= */
@@ -214,5 +218,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_TWI_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_uart.h b/cpu/sam3x8e/include/component/component_uart.h
index af1d6d2cdfff4ecff57c1a90e2ca369633328702..34f63612b5455efea76d75e4b4c3e7d75038ff11 100644
--- a/cpu/sam3x8e/include/component/component_uart.h
+++ b/cpu/sam3x8e/include/component/component_uart.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_UART_COMPONENT_
#define _SAM3XA_UART_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Universal Asynchronous Receiver Transmitter */
/* ============================================================================= */
@@ -182,5 +186,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_UART_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_uotghs.h b/cpu/sam3x8e/include/component/component_uotghs.h
index f8ce0589723ebdcd09d007d2368db3d789ec09e2..7b13dbb5845a0d03a1fa992c61e7293cf7b650e8 100644
--- a/cpu/sam3x8e/include/component/component_uotghs.h
+++ b/cpu/sam3x8e/include/component/component_uotghs.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_UOTGHS_COMPONENT_
#define _SAM3XA_UOTGHS_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR USB On-The-Go Interface */
/* ============================================================================= */
@@ -935,5 +939,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_UOTGHS_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_usart.h b/cpu/sam3x8e/include/component/component_usart.h
index fe4e086721efffa3d9f83f8d04703e4d2d069c2b..175e1336dcc8d71d510801cb1b58e633e3349213 100644
--- a/cpu/sam3x8e/include/component/component_usart.h
+++ b/cpu/sam3x8e/include/component/component_usart.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_USART_COMPONENT_
#define _SAM3XA_USART_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Universal Synchronous Asynchronous Receiver Transmitter */
/* ============================================================================= */
@@ -393,5 +397,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_USART_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/component/component_wdt.h b/cpu/sam3x8e/include/component/component_wdt.h
index 2536edbe8b260e1dc973f3e1392804dcb1a99647..82840229cb14f3277568504c62b83def6855c6b5 100644
--- a/cpu/sam3x8e/include/component/component_wdt.h
+++ b/cpu/sam3x8e/include/component/component_wdt.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_WDT_COMPONENT_
#define _SAM3XA_WDT_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ============================================================================= */
/** SOFTWARE API DEFINITION FOR Watchdog Timer */
/* ============================================================================= */
@@ -69,5 +73,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAM3XA_WDT_COMPONENT_ */
diff --git a/cpu/sam3x8e/include/cpu-conf.h b/cpu/sam3x8e/include/cpu-conf.h
index a67eebf8e94af1ca347eac56188cb83e61f07cbc..70c774f9cbe77f585c46657352c4f07c0a3162ac 100644
--- a/cpu/sam3x8e/include/cpu-conf.h
+++ b/cpu/sam3x8e/include/cpu-conf.h
@@ -20,6 +20,9 @@
#include "sam3x8e.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
/**
* @name Kernel configuration
@@ -47,6 +50,9 @@
#endif
/** @} */
+#ifdef __cplusplus
+}
+#endif
#endif /* __CPU_CONF_H */
/** @} */
diff --git a/cpu/sam3x8e/include/hwtimer_cpu.h b/cpu/sam3x8e/include/hwtimer_cpu.h
index 16613936537710b1e31897db42bffdc7456de8a4..8d021ef10b51468405134b4ee59bed5070e2e6ee 100644
--- a/cpu/sam3x8e/include/hwtimer_cpu.h
+++ b/cpu/sam3x8e/include/hwtimer_cpu.h
@@ -19,6 +19,10 @@
#ifndef __HWTIMER_CPU_H
#define __HWTIMER_CPU_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @name Hardware timer configuration
* @{
@@ -29,5 +33,9 @@
/** @} */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __HWTIMER_CPU_H */
/** @} */
diff --git a/cpu/sam3x8e/include/instance/instance_adc.h b/cpu/sam3x8e/include/instance/instance_adc.h
index a0f1280e56bde764bbdf3f714ea0115c19ca22f9..52c9894764a18b290818fc70a558d8e812eb1316 100644
--- a/cpu/sam3x8e/include/instance/instance_adc.h
+++ b/cpu/sam3x8e/include/instance/instance_adc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_ADC_INSTANCE_
#define _SAM3XA_ADC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for ADC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_ADC_CR (0x400C0000U) /**< \brief (ADC) Control Register */
@@ -89,4 +93,8 @@
#define REG_ADC_PTSR (*(RoReg*)0x400C0124U) /**< \brief (ADC) Transfer Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_ADC_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_can0.h b/cpu/sam3x8e/include/instance/instance_can0.h
index c9b52e8e13f016a745b8034984fbe4bd53cdfd6d..457de9ba8869aefecd6ef8ec8000a693880bdad1 100644
--- a/cpu/sam3x8e/include/instance/instance_can0.h
+++ b/cpu/sam3x8e/include/instance/instance_can0.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_CAN0_INSTANCE_
#define _SAM3XA_CAN0_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for CAN0 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_CAN0_MR (0x400B4000U) /**< \brief (CAN0) Mode Register */
@@ -189,4 +193,8 @@
#define REG_CAN0_MCR7 (*(WoReg*)0x400B42FCU) /**< \brief (CAN0) Mailbox Control Register (MB = 7) */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_CAN0_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_can1.h b/cpu/sam3x8e/include/instance/instance_can1.h
index ee8f8dad8ba0833a3e3f031fe9ccd0d9a620e711..05737ca25c3cfc214c3087dd0ca6d292808e80e6 100644
--- a/cpu/sam3x8e/include/instance/instance_can1.h
+++ b/cpu/sam3x8e/include/instance/instance_can1.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_CAN1_INSTANCE_
#define _SAM3XA_CAN1_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for CAN1 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_CAN1_MR (0x400B8000U) /**< \brief (CAN1) Mode Register */
@@ -189,4 +193,8 @@
#define REG_CAN1_MCR7 (*(WoReg*)0x400B82FCU) /**< \brief (CAN1) Mailbox Control Register (MB = 7) */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_CAN1_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_chipid.h b/cpu/sam3x8e/include/instance/instance_chipid.h
index 0715e43e306730aea8c58060c304215f22df796e..72309edd8318ef7eab43e07bef9ff1fa20723308 100644
--- a/cpu/sam3x8e/include/instance/instance_chipid.h
+++ b/cpu/sam3x8e/include/instance/instance_chipid.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_CHIPID_INSTANCE_
#define _SAM3XA_CHIPID_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for CHIPID peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_CHIPID_CIDR (0x400E0940U) /**< \brief (CHIPID) Chip ID Register */
@@ -39,4 +43,8 @@
#define REG_CHIPID_EXID (*(RoReg*)0x400E0944U) /**< \brief (CHIPID) Chip ID Extension Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_CHIPID_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_dacc.h b/cpu/sam3x8e/include/instance/instance_dacc.h
index 1541cc77e341c39e64f707cea428b38af92a75b0..f9f962e4b599ef4e7fc2864e82d416dbee437846 100644
--- a/cpu/sam3x8e/include/instance/instance_dacc.h
+++ b/cpu/sam3x8e/include/instance/instance_dacc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_DACC_INSTANCE_
#define _SAM3XA_DACC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for DACC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_DACC_CR (0x400C8000U) /**< \brief (DACC) Control Register */
@@ -73,4 +77,8 @@
#define REG_DACC_PTSR (*(RoReg*)0x400C8124U) /**< \brief (DACC) Transfer Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_DACC_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_dmac.h b/cpu/sam3x8e/include/instance/instance_dmac.h
index 10e936b65c8b9e21c98633654c8291f5756302a0..767c8c337b6b4596db51f0b78a2a3cb2176688f2 100644
--- a/cpu/sam3x8e/include/instance/instance_dmac.h
+++ b/cpu/sam3x8e/include/instance/instance_dmac.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_DMAC_INSTANCE_
#define _SAM3XA_DMAC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for DMAC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_DMAC_GCFG (0x400C4000U) /**< \brief (DMAC) DMAC Global Configuration Register */
@@ -135,4 +139,8 @@
#define REG_DMAC_WPSR (*(RoReg*)0x400C41E8U) /**< \brief (DMAC) DMAC Write Protect Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_DMAC_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_efc0.h b/cpu/sam3x8e/include/instance/instance_efc0.h
index fb76726d204aa1e3c342bbc44491d37789b7ccf1..e51ef4a64389b492aa21a7c8a9f69fe40a68b99a 100644
--- a/cpu/sam3x8e/include/instance/instance_efc0.h
+++ b/cpu/sam3x8e/include/instance/instance_efc0.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_EFC0_INSTANCE_
#define _SAM3XA_EFC0_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for EFC0 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_EFC0_FMR (0x400E0A00U) /**< \brief (EFC0) EEFC Flash Mode Register */
@@ -43,4 +47,8 @@
#define REG_EFC0_FRR (*(RoReg*)0x400E0A0CU) /**< \brief (EFC0) EEFC Flash Result Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_EFC0_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_efc1.h b/cpu/sam3x8e/include/instance/instance_efc1.h
index 31034e23c0042213a83cd03b34ec35c3e65bc924..3f9adc862aef5dbb90fe958bed007d063147c344 100644
--- a/cpu/sam3x8e/include/instance/instance_efc1.h
+++ b/cpu/sam3x8e/include/instance/instance_efc1.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_EFC1_INSTANCE_
#define _SAM3XA_EFC1_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for EFC1 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_EFC1_FMR (0x400E0C00U) /**< \brief (EFC1) EEFC Flash Mode Register */
@@ -43,4 +47,8 @@
#define REG_EFC1_FRR (*(RoReg*)0x400E0C0CU) /**< \brief (EFC1) EEFC Flash Result Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_EFC1_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_emac.h b/cpu/sam3x8e/include/instance/instance_emac.h
index 68cc2535f23c23a02b9016cf008927876716d224..05fd7a04ff835cbc1f7a5328b6dd951646e8ae55 100644
--- a/cpu/sam3x8e/include/instance/instance_emac.h
+++ b/cpu/sam3x8e/include/instance/instance_emac.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_EMAC_INSTANCE_
#define _SAM3XA_EMAC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for EMAC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_EMAC_NCR (0x400B0000U) /**< \brief (EMAC) Network Control Register */
@@ -125,4 +129,8 @@
#define REG_EMAC_USRIO (*(RwReg*)0x400B00C0U) /**< \brief (EMAC) User Input/Output Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_EMAC_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_gpbr.h b/cpu/sam3x8e/include/instance/instance_gpbr.h
index 628eb1d670c779efe7514f921483bfa65e086bc8..fc76ad786ca54970c66a6f77f719771335fd15d0 100644
--- a/cpu/sam3x8e/include/instance/instance_gpbr.h
+++ b/cpu/sam3x8e/include/instance/instance_gpbr.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_GPBR_INSTANCE_
#define _SAM3XA_GPBR_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for GPBR peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_GPBR_GPBR (0x400E1A90U) /**< \brief (GPBR) General Purpose Backup Register */
@@ -37,4 +41,8 @@
#define REG_GPBR_GPBR (*(RwReg*)0x400E1A90U) /**< \brief (GPBR) General Purpose Backup Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_GPBR_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_hsmci.h b/cpu/sam3x8e/include/instance/instance_hsmci.h
index db43127ec67c9f0846a55a8e7426a914980196b4..918e052e0637f27e618392362246719e0f64f179 100644
--- a/cpu/sam3x8e/include/instance/instance_hsmci.h
+++ b/cpu/sam3x8e/include/instance/instance_hsmci.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_HSMCI_INSTANCE_
#define _SAM3XA_HSMCI_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for HSMCI peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_HSMCI_CR (0x40000000U) /**< \brief (HSMCI) Control Register */
@@ -75,4 +79,8 @@
#define REG_HSMCI_FIFO (*(RwReg*)0x40000200U) /**< \brief (HSMCI) FIFO Memory Aperture0 */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_HSMCI_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_matrix.h b/cpu/sam3x8e/include/instance/instance_matrix.h
index a226f4a7257792eb4007b189ab0e339732b2e958..2f1445a26cf676407c0d78b0efee3c2cafff5abd 100644
--- a/cpu/sam3x8e/include/instance/instance_matrix.h
+++ b/cpu/sam3x8e/include/instance/instance_matrix.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_MATRIX_INSTANCE_
#define _SAM3XA_MATRIX_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for MATRIX peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_MATRIX_MCFG (0x400E0400U) /**< \brief (MATRIX) Master Configuration Register */
@@ -65,4 +69,8 @@
#define REG_MATRIX_WPSR (*(RoReg*)0x400E05E8U) /**< \brief (MATRIX) Write Protect Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_MATRIX_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_pioa.h b/cpu/sam3x8e/include/instance/instance_pioa.h
index b7c0867a44aab3350122409c41ec25eece2b7d64..0b127d054e4e777d015789153e12c66bd51411af 100644
--- a/cpu/sam3x8e/include/instance/instance_pioa.h
+++ b/cpu/sam3x8e/include/instance/instance_pioa.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_PIOA_INSTANCE_
#define _SAM3XA_PIOA_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for PIOA peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_PIOA_PER (0x400E0E00U) /**< \brief (PIOA) PIO Enable Register */
@@ -121,4 +125,8 @@
#define REG_PIOA_WPSR (*(RoReg*)0x400E0EE8U) /**< \brief (PIOA) Write Protect Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_PIOA_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_piob.h b/cpu/sam3x8e/include/instance/instance_piob.h
index c9a608cd11c9de0eb16cb7ce7e314a242da453e7..665fb2778ce84ae0f3e992596e441b7f0fea0353 100644
--- a/cpu/sam3x8e/include/instance/instance_piob.h
+++ b/cpu/sam3x8e/include/instance/instance_piob.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_PIOB_INSTANCE_
#define _SAM3XA_PIOB_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for PIOB peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_PIOB_PER (0x400E1000U) /**< \brief (PIOB) PIO Enable Register */
@@ -121,4 +125,8 @@
#define REG_PIOB_WPSR (*(RoReg*)0x400E10E8U) /**< \brief (PIOB) Write Protect Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_PIOB_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_pioc.h b/cpu/sam3x8e/include/instance/instance_pioc.h
index ccbee7bf56bdadf269213b207b5b4ec16aef7b1e..0302be8872e9f0bd1bd89dc08b0237afe775f07c 100644
--- a/cpu/sam3x8e/include/instance/instance_pioc.h
+++ b/cpu/sam3x8e/include/instance/instance_pioc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_PIOC_INSTANCE_
#define _SAM3XA_PIOC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for PIOC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_PIOC_PER (0x400E1200U) /**< \brief (PIOC) PIO Enable Register */
@@ -121,4 +125,8 @@
#define REG_PIOC_WPSR (*(RoReg*)0x400E12E8U) /**< \brief (PIOC) Write Protect Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_PIOC_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_piod.h b/cpu/sam3x8e/include/instance/instance_piod.h
index b6d81ef8362df59b940a5f391dd94f45a9b60980..b1bd282339b1fc16754a99ca3895a5f9ac6a659f 100644
--- a/cpu/sam3x8e/include/instance/instance_piod.h
+++ b/cpu/sam3x8e/include/instance/instance_piod.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_PIOD_INSTANCE_
#define _SAM3XA_PIOD_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for PIOD peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_PIOD_PER (0x400E1400U) /**< \brief (PIOD) PIO Enable Register */
@@ -121,4 +125,8 @@
#define REG_PIOD_WPSR (*(RoReg*)0x400E14E8U) /**< \brief (PIOD) Write Protect Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_PIOD_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_pioe.h b/cpu/sam3x8e/include/instance/instance_pioe.h
index c1cc5424319b2346f0bbb628894acaefdbfe1153..58827202f3dab2c3ede2ae801c49f6b3e797bf78 100644
--- a/cpu/sam3x8e/include/instance/instance_pioe.h
+++ b/cpu/sam3x8e/include/instance/instance_pioe.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_PIOE_INSTANCE_
#define _SAM3XA_PIOE_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for PIOE peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_PIOE_PER (0x400E1600U) /**< \brief (PIOE) PIO Enable Register */
@@ -121,4 +125,8 @@
#define REG_PIOE_WPSR (*(RoReg*)0x400E16E8U) /**< \brief (PIOE) Write Protect Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_PIOE_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_piof.h b/cpu/sam3x8e/include/instance/instance_piof.h
index 3e52677370a10027063332dedc89d5547f2d1864..b685592aae5de34239e876dc3c27412c7f10a76f 100644
--- a/cpu/sam3x8e/include/instance/instance_piof.h
+++ b/cpu/sam3x8e/include/instance/instance_piof.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_PIOF_INSTANCE_
#define _SAM3XA_PIOF_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for PIOF peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_PIOF_PER (0x400E1800U) /**< \brief (PIOF) PIO Enable Register */
@@ -121,4 +125,8 @@
#define REG_PIOF_WPSR (*(RoReg*)0x400E18E8U) /**< \brief (PIOF) Write Protect Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_PIOF_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_pmc.h b/cpu/sam3x8e/include/instance/instance_pmc.h
index 37e16dd3c060c42c514c14d66c80e133e3bf5959..b2366a4d1c2b122ad64c4d7352bd685f2973eba6 100644
--- a/cpu/sam3x8e/include/instance/instance_pmc.h
+++ b/cpu/sam3x8e/include/instance/instance_pmc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_PMC_INSTANCE_
#define _SAM3XA_PMC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for PMC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_PMC_SCER (0x400E0600U) /**< \brief (PMC) System Clock Enable Register */
@@ -87,4 +91,8 @@
#define REG_PMC_PCR (*(RwReg*)0x400E070CU) /**< \brief (PMC) Peripheral Control Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_PMC_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_pwm.h b/cpu/sam3x8e/include/instance/instance_pwm.h
index 1adda68f1bcdcb9fc023839334ce292387c52f8b..7b6cefcfad4ae34213433630a922dcfdb46d4d9e 100644
--- a/cpu/sam3x8e/include/instance/instance_pwm.h
+++ b/cpu/sam3x8e/include/instance/instance_pwm.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_PWM_INSTANCE_
#define _SAM3XA_PWM_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for PWM peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_PWM_CLK (0x40094000U) /**< \brief (PWM) PWM Clock Register */
@@ -303,4 +307,8 @@
#define REG_PWM_DTUPD7 (*(WoReg*)0x400942FCU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 7) */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_PWM_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_rstc.h b/cpu/sam3x8e/include/instance/instance_rstc.h
index a7e4f32da962d4efb5014cf9db9e846aef813469..67724996ac6a151850a02be3875c9fa1b69f23cb 100644
--- a/cpu/sam3x8e/include/instance/instance_rstc.h
+++ b/cpu/sam3x8e/include/instance/instance_rstc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_RSTC_INSTANCE_
#define _SAM3XA_RSTC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for RSTC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_RSTC_CR (0x400E1A00U) /**< \brief (RSTC) Control Register */
@@ -41,4 +45,8 @@
#define REG_RSTC_MR (*(RwReg*)0x400E1A08U) /**< \brief (RSTC) Mode Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_RSTC_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_rtc.h b/cpu/sam3x8e/include/instance/instance_rtc.h
index 750633e598b007b0d7d1a9f757c34dc470d4ba01..f74951a59475605724fb59c7e047f74fe859dd43 100644
--- a/cpu/sam3x8e/include/instance/instance_rtc.h
+++ b/cpu/sam3x8e/include/instance/instance_rtc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_RTC_INSTANCE_
#define _SAM3XA_RTC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for RTC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_RTC_CR (0x400E1A60U) /**< \brief (RTC) Control Register */
@@ -61,4 +65,8 @@
#define REG_RTC_WPMR (*(RwReg*)0x400E1B44U) /**< \brief (RTC) Write Protect Mode Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_RTC_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_rtt.h b/cpu/sam3x8e/include/instance/instance_rtt.h
index f41d3e2b43c3b263e0a38821c5401751c6d6c78b..f254377ab4f945b87f2c6bb5d05dc96fd2218f15 100644
--- a/cpu/sam3x8e/include/instance/instance_rtt.h
+++ b/cpu/sam3x8e/include/instance/instance_rtt.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_RTT_INSTANCE_
#define _SAM3XA_RTT_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for RTT peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_RTT_MR (0x400E1A30U) /**< \brief (RTT) Mode Register */
@@ -43,4 +47,8 @@
#define REG_RTT_SR (*(RoReg*)0x400E1A3CU) /**< \brief (RTT) Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_RTT_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_sdramc.h b/cpu/sam3x8e/include/instance/instance_sdramc.h
index 68dfe637f91a364381690dfc9c57f4e93be6482d..26c12a57b3cac064e8e32d290a7dd8a0a2c5f5e5 100644
--- a/cpu/sam3x8e/include/instance/instance_sdramc.h
+++ b/cpu/sam3x8e/include/instance/instance_sdramc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_SDRAMC_INSTANCE_
#define _SAM3XA_SDRAMC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for SDRAMC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_SDRAMC_MR (0x400E0200U) /**< \brief (SDRAMC) SDRAMC Mode Register */
@@ -57,4 +61,8 @@
#define REG_SDRAMC_OCMS (*(RwReg*)0x400E022CU) /**< \brief (SDRAMC) SDRAMC OCMS Register 1 */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_SDRAMC_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_smc.h b/cpu/sam3x8e/include/instance/instance_smc.h
index 1298d3ed9b9dcefdd40f9f49bc96c3d40caecc6c..cf0b5a39d3941db9bce70acacfc0b3f7b1f2c8d2 100644
--- a/cpu/sam3x8e/include/instance/instance_smc.h
+++ b/cpu/sam3x8e/include/instance/instance_smc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_SMC_INSTANCE_
#define _SAM3XA_SMC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for SMC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_SMC_CFG (0x400E0000U) /**< \brief (SMC) SMC NFC Configuration Register */
@@ -181,4 +185,8 @@
#define REG_SMC_WPSR (*(RoReg*)0x400E01E8U) /**< \brief (SMC) Write Protection Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_SMC_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_spi0.h b/cpu/sam3x8e/include/instance/instance_spi0.h
index aca3ffb2457d2b26b1bee585c8c08e257b4c13fc..87867da6adcfe64930da25f35c5834c719f0a7ed 100644
--- a/cpu/sam3x8e/include/instance/instance_spi0.h
+++ b/cpu/sam3x8e/include/instance/instance_spi0.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_SPI0_INSTANCE_
#define _SAM3XA_SPI0_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for SPI0 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_SPI0_CR (0x40008000U) /**< \brief (SPI0) Control Register */
@@ -57,4 +61,8 @@
#define REG_SPI0_WPSR (*(RoReg*)0x400080E8U) /**< \brief (SPI0) Write Protection Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_SPI0_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_spi1.h b/cpu/sam3x8e/include/instance/instance_spi1.h
index 48ecc0e8616231bb376c7ef04c6859b71fbbad1b..3042f11cb6a948d9bad76976b835f2eb38c237e4 100644
--- a/cpu/sam3x8e/include/instance/instance_spi1.h
+++ b/cpu/sam3x8e/include/instance/instance_spi1.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_SPI1_INSTANCE_
#define _SAM3XA_SPI1_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for SPI1 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_SPI1_CR (0x4000C000U) /**< \brief (SPI1) Control Register */
@@ -57,4 +61,8 @@
#define REG_SPI1_WPSR (*(RoReg*)0x4000C0E8U) /**< \brief (SPI1) Write Protection Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_SPI1_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_ssc.h b/cpu/sam3x8e/include/instance/instance_ssc.h
index db174a274b947ff836566af7a986314ee17bb395..e14562dd8cca044d5492abc8b4675c2620ba2a41 100644
--- a/cpu/sam3x8e/include/instance/instance_ssc.h
+++ b/cpu/sam3x8e/include/instance/instance_ssc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_SSC_INSTANCE_
#define _SAM3XA_SSC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for SSC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_SSC_CR (0x40004000U) /**< \brief (SSC) Control Register */
@@ -71,4 +75,8 @@
#define REG_SSC_WPSR (*(RoReg*)0x400040E8U) /**< \brief (SSC) Write Protect Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_SSC_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_supc.h b/cpu/sam3x8e/include/instance/instance_supc.h
index 154fcdae59f94b6fbff782e74892660ef9dae816..690f37d506095c0571216693e9c0788237812cfe 100644
--- a/cpu/sam3x8e/include/instance/instance_supc.h
+++ b/cpu/sam3x8e/include/instance/instance_supc.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_SUPC_INSTANCE_
#define _SAM3XA_SUPC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for SUPC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_SUPC_CR (0x400E1A10U) /**< \brief (SUPC) Supply Controller Control Register */
@@ -47,4 +51,8 @@
#define REG_SUPC_SR (*(RoReg*)0x400E1A24U) /**< \brief (SUPC) Supply Controller Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_SUPC_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_tc0.h b/cpu/sam3x8e/include/instance/instance_tc0.h
index 08be078743eccf9fd82b39aa8c313b20b70fabb0..2cf5838b428772b60b008c2b71b742191e11e7ad 100644
--- a/cpu/sam3x8e/include/instance/instance_tc0.h
+++ b/cpu/sam3x8e/include/instance/instance_tc0.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_TC0_INSTANCE_
#define _SAM3XA_TC0_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TC0 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TC0_CCR0 (0x40080000U) /**< \brief (TC0) Channel Control Register (channel = 0) */
@@ -117,4 +121,8 @@
#define REG_TC0_WPMR (*(RwReg*)0x400800E4U) /**< \brief (TC0) Write Protect Mode Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_TC0_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_tc1.h b/cpu/sam3x8e/include/instance/instance_tc1.h
index a4b9510c0e8a310faba569b4ef3a40d03963be9c..2ca975006c554dc83d779f510288395ad3a79542 100644
--- a/cpu/sam3x8e/include/instance/instance_tc1.h
+++ b/cpu/sam3x8e/include/instance/instance_tc1.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_TC1_INSTANCE_
#define _SAM3XA_TC1_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TC1 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TC1_CCR0 (0x40084000U) /**< \brief (TC1) Channel Control Register (channel = 0) */
@@ -117,4 +121,8 @@
#define REG_TC1_WPMR (*(RwReg*)0x400840E4U) /**< \brief (TC1) Write Protect Mode Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_TC1_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_tc2.h b/cpu/sam3x8e/include/instance/instance_tc2.h
index 5846918af8c1a04f6377d763de1919aa2c77d86e..ded617654abffebf6d0f247ea0542c3b66cf2b09 100644
--- a/cpu/sam3x8e/include/instance/instance_tc2.h
+++ b/cpu/sam3x8e/include/instance/instance_tc2.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_TC2_INSTANCE_
#define _SAM3XA_TC2_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TC2 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TC2_CCR0 (0x40088000U) /**< \brief (TC2) Channel Control Register (channel = 0) */
@@ -117,4 +121,8 @@
#define REG_TC2_WPMR (*(RwReg*)0x400880E4U) /**< \brief (TC2) Write Protect Mode Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_TC2_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_trng.h b/cpu/sam3x8e/include/instance/instance_trng.h
index af78925764f3589cb39282c8571e18446b617285..3c88156b3177f4ceb4da87e3be5aec123a5f6a66 100644
--- a/cpu/sam3x8e/include/instance/instance_trng.h
+++ b/cpu/sam3x8e/include/instance/instance_trng.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_TRNG_INSTANCE_
#define _SAM3XA_TRNG_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TRNG peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TRNG_CR (0x400BC000U) /**< \brief (TRNG) Control Register */
@@ -47,4 +51,8 @@
#define REG_TRNG_ODATA (*(RoReg*)0x400BC050U) /**< \brief (TRNG) Output Data Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_TRNG_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_twi0.h b/cpu/sam3x8e/include/instance/instance_twi0.h
index fa20773ab794abe421b920c4fc829864969b2485..b01fd7a96cbea8b766fb591fa8052ff9ce3c571a 100644
--- a/cpu/sam3x8e/include/instance/instance_twi0.h
+++ b/cpu/sam3x8e/include/instance/instance_twi0.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_TWI0_INSTANCE_
#define _SAM3XA_TWI0_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TWI0 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TWI0_CR (0x4008C000U) /**< \brief (TWI0) Control Register */
@@ -77,4 +81,8 @@
#define REG_TWI0_PTSR (*(RoReg*)0x4008C124U) /**< \brief (TWI0) Transfer Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_TWI0_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_twi1.h b/cpu/sam3x8e/include/instance/instance_twi1.h
index 3427f611a4272235d6cfa7e286902d4f0f4b4c5b..b8e3c117fc2492fff5e23bd64cfbea11e5e7f101 100644
--- a/cpu/sam3x8e/include/instance/instance_twi1.h
+++ b/cpu/sam3x8e/include/instance/instance_twi1.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_TWI1_INSTANCE_
#define _SAM3XA_TWI1_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TWI1 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TWI1_CR (0x40090000U) /**< \brief (TWI1) Control Register */
@@ -77,4 +81,8 @@
#define REG_TWI1_PTSR (*(RoReg*)0x40090124U) /**< \brief (TWI1) Transfer Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_TWI1_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_uart.h b/cpu/sam3x8e/include/instance/instance_uart.h
index 9c8e1d5f7e6374f95b4d02ed6afe08f36e1f1a11..c2c44ad80c9641dc74643044e3d6ab324b60a089 100644
--- a/cpu/sam3x8e/include/instance/instance_uart.h
+++ b/cpu/sam3x8e/include/instance/instance_uart.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_UART_INSTANCE_
#define _SAM3XA_UART_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for UART peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_UART_CR (0x400E0800U) /**< \brief (UART) Control Register */
@@ -73,4 +77,8 @@
#define REG_UART_PTSR (*(RoReg*)0x400E0924U) /**< \brief (UART) Transfer Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_UART_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_uotghs.h b/cpu/sam3x8e/include/instance/instance_uotghs.h
index fabdab1e9619bd73602b7dc82fab9aaf5055066d..e64d3d0e76be00c3faf6a53ccd84ac7d87bef44e 100644
--- a/cpu/sam3x8e/include/instance/instance_uotghs.h
+++ b/cpu/sam3x8e/include/instance/instance_uotghs.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_UOTGHS_INSTANCE_
#define _SAM3XA_UOTGHS_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for UOTGHS peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_UOTGHS_DEVCTRL (0x400AC000U) /**< \brief (UOTGHS) Device General Control Register */
@@ -231,4 +235,8 @@
#define REG_UOTGHS_FSM (*(RoReg*)0x400AC82CU) /**< \brief (UOTGHS) General Finite State Machine Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_UOTGHS_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_usart0.h b/cpu/sam3x8e/include/instance/instance_usart0.h
index d5ece717b9e250fc784b3c3c2e211f5b5c7c8a8a..24de27815c8e0c0c49fbb7672fbebb6b6a0d5a97 100644
--- a/cpu/sam3x8e/include/instance/instance_usart0.h
+++ b/cpu/sam3x8e/include/instance/instance_usart0.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_USART0_INSTANCE_
#define _SAM3XA_USART0_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for USART0 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_USART0_CR (0x40098000U) /**< \brief (USART0) Control Register */
@@ -93,4 +97,8 @@
#define REG_USART0_PTSR (*(RoReg*)0x40098124U) /**< \brief (USART0) Transfer Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_USART0_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_usart1.h b/cpu/sam3x8e/include/instance/instance_usart1.h
index daf475b627b5d933b98958180a17f616bf666283..1982061ddd2cef590837eab4b3d8af8f4df13c25 100644
--- a/cpu/sam3x8e/include/instance/instance_usart1.h
+++ b/cpu/sam3x8e/include/instance/instance_usart1.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_USART1_INSTANCE_
#define _SAM3XA_USART1_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for USART1 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_USART1_CR (0x4009C000U) /**< \brief (USART1) Control Register */
@@ -93,4 +97,8 @@
#define REG_USART1_PTSR (*(RoReg*)0x4009C124U) /**< \brief (USART1) Transfer Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_USART1_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_usart2.h b/cpu/sam3x8e/include/instance/instance_usart2.h
index 08910932e598b12239ab46980d61044f83c97700..7c052575c481d6a433eea9a1dbbbec97ffd4b598 100644
--- a/cpu/sam3x8e/include/instance/instance_usart2.h
+++ b/cpu/sam3x8e/include/instance/instance_usart2.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_USART2_INSTANCE_
#define _SAM3XA_USART2_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for USART2 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_USART2_CR (0x400A0000U) /**< \brief (USART2) Control Register */
@@ -93,4 +97,8 @@
#define REG_USART2_PTSR (*(RoReg*)0x400A0124U) /**< \brief (USART2) Transfer Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_USART2_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_usart3.h b/cpu/sam3x8e/include/instance/instance_usart3.h
index df12c98bb4778895fe8c1cc8ffa544bd682c7738..2d4b5ea4d98a4c97147a193e6bf09303456c3123 100644
--- a/cpu/sam3x8e/include/instance/instance_usart3.h
+++ b/cpu/sam3x8e/include/instance/instance_usart3.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_USART3_INSTANCE_
#define _SAM3XA_USART3_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for USART3 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_USART3_CR (0x400A4000U) /**< \brief (USART3) Control Register */
@@ -93,4 +97,8 @@
#define REG_USART3_PTSR (*(RoReg*)0x400A4124U) /**< \brief (USART3) Transfer Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_USART3_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/instance/instance_wdt.h b/cpu/sam3x8e/include/instance/instance_wdt.h
index a122b9aa170473a4f1179b517007b36d8f29563b..d0a0361e214046c773f1cf1d91c217a55314b84b 100644
--- a/cpu/sam3x8e/include/instance/instance_wdt.h
+++ b/cpu/sam3x8e/include/instance/instance_wdt.h
@@ -30,6 +30,10 @@
#ifndef _SAM3XA_WDT_INSTANCE_
#define _SAM3XA_WDT_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for WDT peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_WDT_CR (0x400E1A50U) /**< \brief (WDT) Control Register */
@@ -41,4 +45,8 @@
#define REG_WDT_SR (*(RoReg*)0x400E1A58U) /**< \brief (WDT) Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3XA_WDT_INSTANCE_ */
diff --git a/cpu/sam3x8e/include/pio/pio_sam3x8e.h b/cpu/sam3x8e/include/pio/pio_sam3x8e.h
index 29c095476d52f8ef0087763c1b5d30f684ec86fb..3a3e3451cd3035cf718e03006bb804a9278f9700 100644
--- a/cpu/sam3x8e/include/pio/pio_sam3x8e.h
+++ b/cpu/sam3x8e/include/pio/pio_sam3x8e.h
@@ -30,6 +30,10 @@
#ifndef _SAM3X8E_PIO_
#define _SAM3X8E_PIO_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define PIO_PA0 (1u << 0) /**< \brief Pin Controlled by PA0 */
#define PIO_PA1 (1u << 1) /**< \brief Pin Controlled by PA1 */
#define PIO_PA2 (1u << 2) /**< \brief Pin Controlled by PA2 */
@@ -549,4 +553,8 @@
#define PIO_PD9_IDX 105
#define PIO_PD10_IDX 106
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAM3X8E_PIO_ */
diff --git a/cpu/sam3x8e/include/sam3x8e.h b/cpu/sam3x8e/include/sam3x8e.h
index b1810fb9631aec135bf27fcb2dc92ba1649348e1..6adb53e68c3c3ee05dfbd5b9f37859e170d9592b 100644
--- a/cpu/sam3x8e/include/sam3x8e.h
+++ b/cpu/sam3x8e/include/sam3x8e.h
@@ -257,6 +257,10 @@ void WDT_Handler ( void );
* \brief CMSIS includes
*/
+#ifdef __cplusplus
+}
+#endif
+
#include <core_cm3.h>
#if !defined DONT_USE_CMSIS_INIT
#include "system_sam3xa.h"
@@ -573,11 +577,6 @@ void WDT_Handler ( void );
#define CHIP_FREQ_FWS_2 (53000000UL) /**< \brief Maximum operating frequency when FWS is 2 */
#define CHIP_FREQ_FWS_3 (78000000UL) /**< \brief Maximum operating frequency when FWS is 3 */
-
-#ifdef __cplusplus
-}
-#endif
-
/*@}*/
#endif /* _SAM3X8E_ */
diff --git a/cpu/sam3x8e/include/system_sam3xa.h b/cpu/sam3x8e/include/system_sam3xa.h
index b703c8ead600fc5b41b3012f7f68744f971f3de8..1bdf1d959f3826ec84ff2afc63adab8ef0bb212b 100644
--- a/cpu/sam3x8e/include/system_sam3xa.h
+++ b/cpu/sam3x8e/include/system_sam3xa.h
@@ -42,14 +42,15 @@
/* @cond 0 */
/**INDENT-OFF**/
-#ifdef __cplusplus
-extern "C" {
-#endif
/**INDENT-ON**/
/* @endcond */
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */
/**
diff --git a/cpu/samd21/include/component/component_ac.h b/cpu/samd21/include/component/component_ac.h
index a124b3df5c34dedf0d8a15aaa271deb17fa6cf57..a4ee084d0fbc438777f82ef72c116126c106db3c 100644
--- a/cpu/samd21/include/component/component_ac.h
+++ b/cpu/samd21/include/component/component_ac.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_AC_COMPONENT_
#define _SAMR21_AC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR AC */
/* ========================================================================== */
@@ -556,4 +560,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_AC_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_adc.h b/cpu/samd21/include/component/component_adc.h
index 26034e97e45afef017503fd41e675afab3ddb1cc..175c95037e4f61b5a43b1895ea546170e2d5107a 100644
--- a/cpu/samd21/include/component/component_adc.h
+++ b/cpu/samd21/include/component/component_adc.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_ADC_COMPONENT_
#define _SAMR21_ADC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR ADC */
/* ========================================================================== */
@@ -696,4 +700,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_ADC_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_dac.h b/cpu/samd21/include/component/component_dac.h
index a6ba828cd3f0f712058455ea1e0790b6adf0ce0d..cf837ebe64286e742343ad8d672c3003c68a3e37 100644
--- a/cpu/samd21/include/component/component_dac.h
+++ b/cpu/samd21/include/component/component_dac.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_DAC_COMPONENT_
#define _SAMR21_DAC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR DAC */
/* ========================================================================== */
@@ -283,4 +287,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_DAC_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_dmac.h b/cpu/samd21/include/component/component_dmac.h
index 730414a288891a3b7703cb16065638196b68fe7b..b078bde9a93f9a2f25a8f92a8646d488484a9f35 100644
--- a/cpu/samd21/include/component/component_dmac.h
+++ b/cpu/samd21/include/component/component_dmac.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_DMAC_COMPONENT_
#define _SAMR21_DMAC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR DMAC */
/* ========================================================================== */
@@ -1030,4 +1034,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_DMAC_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_dsu.h b/cpu/samd21/include/component/component_dsu.h
index 6e004b61fa6b96c991a134de9f86617f8bb6a785..a134a277e5cebbded6cc6c35ba641dd6423b7101 100644
--- a/cpu/samd21/include/component/component_dsu.h
+++ b/cpu/samd21/include/component/component_dsu.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_DSU_COMPONENT_
#define _SAMR21_DSU_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR DSU */
/* ========================================================================== */
@@ -548,4 +552,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_DSU_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_eic.h b/cpu/samd21/include/component/component_eic.h
index 69b3497659929c72d9f87814bb609548f5503629..e32cf82e6411bf1d0e823ca7b23414642563fac4 100644
--- a/cpu/samd21/include/component/component_eic.h
+++ b/cpu/samd21/include/component/component_eic.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_EIC_COMPONENT_
#define _SAMR21_EIC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR EIC */
/* ========================================================================== */
@@ -678,4 +682,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_EIC_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_evsys.h b/cpu/samd21/include/component/component_evsys.h
index bea440b4781d36ea29da574cb553f4877ba83fe7..23da6019b9a49dd3fdce447392068f55d930b91e 100644
--- a/cpu/samd21/include/component/component_evsys.h
+++ b/cpu/samd21/include/component/component_evsys.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_EVSYS_COMPONENT_
#define _SAMR21_EVSYS_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR EVSYS */
/* ========================================================================== */
@@ -601,4 +605,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_EVSYS_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_gclk.h b/cpu/samd21/include/component/component_gclk.h
index dab90ba72ee13b1541955626cbf702acbefe419c..25279f33669729af589d699ec6dd3244bc8ff29e 100644
--- a/cpu/samd21/include/component/component_gclk.h
+++ b/cpu/samd21/include/component/component_gclk.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_GCLK_COMPONENT_
#define _SAMR21_GCLK_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR GCLK */
/* ========================================================================== */
@@ -231,4 +235,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_GCLK_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_i2s.h b/cpu/samd21/include/component/component_i2s.h
index 677fdb3febb3d09964ee4f6beaef0d82cb5f82c4..377037c74e7bb20db6a51c7600f8e69bdecec97d 100644
--- a/cpu/samd21/include/component/component_i2s.h
+++ b/cpu/samd21/include/component/component_i2s.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_I2S_COMPONENT_
#define _SAMR21_I2S_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR I2S */
/* ========================================================================== */
@@ -636,4 +640,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_I2S_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_mtb.h b/cpu/samd21/include/component/component_mtb.h
index a8fd7d8e8b448597d324490a2fd4a276340d6db1..8410724e0d60d01eab1e75bf7d1e4c3110a00d3c 100644
--- a/cpu/samd21/include/component/component_mtb.h
+++ b/cpu/samd21/include/component/component_mtb.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_MTB_COMPONENT_
#define _SAMR21_MTB_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR MTB */
/* ========================================================================== */
@@ -393,4 +397,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_MTB_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_nvmctrl.h b/cpu/samd21/include/component/component_nvmctrl.h
index f4a46230b115583b8fd4bf2214246231b381cdf0..887865ca2e5ab77a4dd820ab1589d67669bb54c5 100644
--- a/cpu/samd21/include/component/component_nvmctrl.h
+++ b/cpu/samd21/include/component/component_nvmctrl.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_NVMCTRL_COMPONENT_
#define _SAMR21_NVMCTRL_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR NVMCTRL */
/* ========================================================================== */
@@ -527,4 +531,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_NVMCTRL_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_pac.h b/cpu/samd21/include/component/component_pac.h
index 134062bafe799177709aeec6adb4fd772a0c3d7f..517ff65f7951f5a2c5c2dd4c62f4acd167967027 100644
--- a/cpu/samd21/include/component/component_pac.h
+++ b/cpu/samd21/include/component/component_pac.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_PAC_COMPONENT_
#define _SAMR21_PAC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR PAC */
/* ========================================================================== */
@@ -101,4 +105,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_PAC_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_pm.h b/cpu/samd21/include/component/component_pm.h
index ade1d93d1a68a84459802e32d8c2d6e847211aee..b79110336d40d2194480ce716a510cfba131df0b 100644
--- a/cpu/samd21/include/component/component_pm.h
+++ b/cpu/samd21/include/component/component_pm.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_PM_COMPONENT_
#define _SAMR21_PM_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR PM */
/* ========================================================================== */
@@ -521,4 +525,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_PM_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_port.h b/cpu/samd21/include/component/component_port.h
index 565d4eb8f37e4e193c8fa25eeaacaeba16fe62a4..aeec7f7a70401dea00d914bfd19bae5a2975ba8c 100644
--- a/cpu/samd21/include/component/component_port.h
+++ b/cpu/samd21/include/component/component_port.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_PORT_COMPONENT_
#define _SAMR21_PORT_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR PORT */
/* ========================================================================== */
@@ -392,4 +396,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_PORT_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_rfctrl.h b/cpu/samd21/include/component/component_rfctrl.h
index 3316568e6dc86681d3808412aaa2e98aa2eaa89c..d0fc3914ae84999032e0b9c2cea6c5fa9900b085 100644
--- a/cpu/samd21/include/component/component_rfctrl.h
+++ b/cpu/samd21/include/component/component_rfctrl.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_RFCTRL_COMPONENT_
#define _SAMR21_RFCTRL_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR RFCTRL */
/* ========================================================================== */
@@ -101,4 +105,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_RFCTRL_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_rtc.h b/cpu/samd21/include/component/component_rtc.h
index 1b36178488af7f247914d5712684c22634bf364c..a377ca0ee49082f9732a0b64adea6c7bd55576f1 100644
--- a/cpu/samd21/include/component/component_rtc.h
+++ b/cpu/samd21/include/component/component_rtc.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_RTC_COMPONENT_
#define _SAMR21_RTC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR RTC */
/* ========================================================================== */
@@ -1059,4 +1063,8 @@ typedef union {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_RTC_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_sercom.h b/cpu/samd21/include/component/component_sercom.h
index 7c2b6639f9a5c37b9a9fd69dee13804a80dfcd81..c3a9d1f0b19a2ab5fb8a556e1db1bf31213aef90 100644
--- a/cpu/samd21/include/component/component_sercom.h
+++ b/cpu/samd21/include/component/component_sercom.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_SERCOM_COMPONENT_
#define _SAMR21_SERCOM_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR SERCOM */
/* ========================================================================== */
@@ -1505,4 +1509,8 @@ typedef union {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_SERCOM_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_sysctrl.h b/cpu/samd21/include/component/component_sysctrl.h
index c7fdb2005efe07cf79f350d66ca4f27b02d5298e..7eecf0d8779f7ae6eb015dd0a8f4ebb629e94ae5 100644
--- a/cpu/samd21/include/component/component_sysctrl.h
+++ b/cpu/samd21/include/component/component_sysctrl.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_SYSCTRL_COMPONENT_
#define _SAMR21_SYSCTRL_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR SYSCTRL */
/* ========================================================================== */
@@ -945,4 +949,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_SYSCTRL_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_tc.h b/cpu/samd21/include/component/component_tc.h
index 64c422f343357b98248a5ac4264bf1417fe012b0..f37e67a83c818cdb8562f52cee5f3f646ed761c5 100644
--- a/cpu/samd21/include/component/component_tc.h
+++ b/cpu/samd21/include/component/component_tc.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_TC_COMPONENT_
#define _SAMR21_TC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR TC */
/* ========================================================================== */
@@ -681,4 +685,8 @@ typedef union {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_TC_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_tcc.h b/cpu/samd21/include/component/component_tcc.h
index 13c8a10798e3204f3e7f9e848829453e5e5c0c3a..33e7aa104adef4f1a2bd4943bfeb94a1833a3cfe 100644
--- a/cpu/samd21/include/component/component_tcc.h
+++ b/cpu/samd21/include/component/component_tcc.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_TCC_COMPONENT_
#define _SAMR21_TCC_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR TCC */
/* ========================================================================== */
@@ -1605,4 +1609,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_TCC_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_usb.h b/cpu/samd21/include/component/component_usb.h
index 7c1e2efc44f729332d9ce696d86b8654f772fc52..1722d4552296861075024d4847bff677ada13c85 100644
--- a/cpu/samd21/include/component/component_usb.h
+++ b/cpu/samd21/include/component/component_usb.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_USB_COMPONENT_
#define _SAMR21_USB_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR USB */
/* ========================================================================== */
@@ -1764,4 +1768,8 @@ typedef union {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_USB_COMPONENT_ */
diff --git a/cpu/samd21/include/component/component_wdt.h b/cpu/samd21/include/component/component_wdt.h
index f968382fe168a5644f24d4371dd4f1fc2ea3fdcc..de11d9a8fbe0b0138cc8481acea0ca2961ea53d3 100644
--- a/cpu/samd21/include/component/component_wdt.h
+++ b/cpu/samd21/include/component/component_wdt.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_WDT_COMPONENT_
#define _SAMR21_WDT_COMPONENT_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========================================================================== */
/** SOFTWARE API DEFINITION FOR WDT */
/* ========================================================================== */
@@ -300,4 +304,8 @@ typedef struct {
/*@}*/
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_WDT_COMPONENT_ */
diff --git a/cpu/samd21/include/cpu-conf.h b/cpu/samd21/include/cpu-conf.h
index b2dd64aee55e0bdfa2216823b4b51447be0422ae..c0416ac8ab670851b7916ba99137a8243fce5212 100644
--- a/cpu/samd21/include/cpu-conf.h
+++ b/cpu/samd21/include/cpu-conf.h
@@ -20,6 +20,9 @@
#include "samd21.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
/**
* @name Kernel configuration
@@ -47,6 +50,9 @@
#endif
/** @} */
+#ifdef __cplusplus
+}
+#endif
#endif /* __CPU_CONF_H */
/** @} */
diff --git a/cpu/samd21/include/hwtimer_cpu.h b/cpu/samd21/include/hwtimer_cpu.h
index 293f9915aabe64c44dea55448a883e71de799c3b..1373400d9e52939a2d210f54305668b1a1638706 100644
--- a/cpu/samd21/include/hwtimer_cpu.h
+++ b/cpu/samd21/include/hwtimer_cpu.h
@@ -19,6 +19,10 @@
#ifndef __HWTIMER_CPU_H
#define __HWTIMER_CPU_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @name Hardware timer configuration
* @{
@@ -28,6 +32,9 @@
#define HWTIMER_MAXTICKS (0xFFFF) /**< 16-bit timer */
/** @} */
+#ifdef __cplusplus
+}
+#endif
#endif /* __HWTIMER_CPU_H */
/** @} */
diff --git a/cpu/samd21/include/instance/instance_ac.h b/cpu/samd21/include/instance/instance_ac.h
index 4bc304772910c26c9ae5643c0830054b2485ebd8..2ff10bb8245235e66db1154699d90edae40eb29c 100644
--- a/cpu/samd21/include/instance/instance_ac.h
+++ b/cpu/samd21/include/instance/instance_ac.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_AC_INSTANCE_
#define _SAMR21_AC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for AC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_AC_CTRLA (0x42004400U) /**< \brief (AC) Control A */
@@ -84,4 +88,8 @@
#define AC_NUM_CMP AC_CMP_NUM
#define AC_PAIRS 1
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_AC_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_adc.h b/cpu/samd21/include/instance/instance_adc.h
index 4eca25bad240209e278a6a513912440dbda464a7..62c900131075dc16ad724870f379649505765b73 100644
--- a/cpu/samd21/include/instance/instance_adc.h
+++ b/cpu/samd21/include/instance/instance_adc.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_ADC_INSTANCE_
#define _SAMR21_ADC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for ADC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_ADC_CTRLA (0x42004000U) /**< \brief (ADC) Control A */
@@ -96,4 +100,8 @@
#define ADC_RESULT_BITS 16
#define ADC_RESULT_MSB (ADC_RESULT_BITS-1)
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_ADC_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_dac.h b/cpu/samd21/include/instance/instance_dac.h
index 4469da400e77278939e7df67a8cf1ca8850e765c..95484be394f1d53c4726b25797ea34aa04f62ad8 100644
--- a/cpu/samd21/include/instance/instance_dac.h
+++ b/cpu/samd21/include/instance/instance_dac.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_DAC_INSTANCE_
#define _SAMR21_DAC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for DAC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_DAC_CTRLA (0x42004800U) /**< \brief (DAC) Control A */
@@ -71,4 +75,8 @@
#define DAC_DMAC_ID_EMPTY 40
#define DAC_GCLK_ID 33
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_DAC_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_dmac.h b/cpu/samd21/include/instance/instance_dmac.h
index 329d75d62257bf8c7b27af578415a23aa4bff94e..5212af3d6949b916bb5b36921ccdf4271f514bcc 100644
--- a/cpu/samd21/include/instance/instance_dmac.h
+++ b/cpu/samd21/include/instance/instance_dmac.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_DMAC_INSTANCE_
#define _SAMR21_DMAC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for DMAC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_DMAC_CTRL (0x41004800U) /**< \brief (DMAC) Control */
@@ -104,4 +108,8 @@
#define DMAC_TRIG_BITS len(bin(DMAC_TRIG_NUM - 1))-2
#define DMAC_TRIG_NUM 45
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_DMAC_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_dsu.h b/cpu/samd21/include/instance/instance_dsu.h
index 461e597e4b1fb82ac686b6216737d90dcdf84bb0..f76acad251dfbfb168784f3a21a1c3e031d60bd9 100644
--- a/cpu/samd21/include/instance/instance_dsu.h
+++ b/cpu/samd21/include/instance/instance_dsu.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_DSU_INSTANCE_
#define _SAMR21_DSU_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for DSU peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_DSU_CTRL (0x41002000U) /**< \brief (DSU) Control */
@@ -96,4 +100,8 @@
/* ========== Instance parameters for DSU peripheral ========== */
#define DSU_CLK_HSB_ID 3
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_DSU_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_eic.h b/cpu/samd21/include/instance/instance_eic.h
index 225815e961feb9d0f713aec3a3ede213c8edd187..8442ca935a65b28439dbe225c148d00f54c25daf 100644
--- a/cpu/samd21/include/instance/instance_eic.h
+++ b/cpu/samd21/include/instance/instance_eic.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_EIC_INSTANCE_
#define _SAMR21_EIC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for EIC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_EIC_CTRL (0x40001800U) /**< \brief (EIC) Control */
@@ -75,4 +79,8 @@
#define EIC_CONFIG_NUM ((EIC_EXTINT_NUM+7)/8)
#define EIC_GCLK_ID 5
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_EIC_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_evsys.h b/cpu/samd21/include/instance/instance_evsys.h
index eec071aa0ed000286ca87e88803810a854ee20b3..06adf54f4143fe76fa648f9eb7b2cca4ef70f527 100644
--- a/cpu/samd21/include/instance/instance_evsys.h
+++ b/cpu/samd21/include/instance/instance_evsys.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_EVSYS_INSTANCE_
#define _SAMR21_EVSYS_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for EVSYS peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_EVSYS_CTRL (0x42000400U) /**< \brief (EVSYS) Control */
@@ -194,4 +198,8 @@
#define EVSYS_ID_USER_DAC_START 27
#define EVSYS_ID_USER_PTC_STCONV 28
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_EVSYS_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_gclk.h b/cpu/samd21/include/instance/instance_gclk.h
index 918827766a0cfe91521d30b39c1799a0ce6fba88..cbe784d8e2e296f58840847a3ad6007377296b98 100644
--- a/cpu/samd21/include/instance/instance_gclk.h
+++ b/cpu/samd21/include/instance/instance_gclk.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_GCLK_INSTANCE_
#define _SAMR21_GCLK_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for GCLK peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_GCLK_CTRL (0x40000C00U) /**< \brief (GCLK) Control */
@@ -76,4 +80,8 @@
#define GCLK_SOURCE_XOSC 0
#define GCLK_SOURCE_XOSC32K 5
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_GCLK_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_i2s.h b/cpu/samd21/include/instance/instance_i2s.h
index 95da07b65b7aa107bc350c4bf55a8bee193ca035..620fa0bb8a153e5ba2cf6f12b25843a97fbceaa3 100644
--- a/cpu/samd21/include/instance/instance_i2s.h
+++ b/cpu/samd21/include/instance/instance_i2s.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_I2S_INSTANCE_
#define _SAMR21_I2S_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for I2S peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_I2S_CTRLA (0x42005000U) /**< \brief (I2S) Control A */
@@ -91,4 +95,8 @@
#define I2S_MAX_SLOTS 8
#define I2S_SER_NUM 2
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_I2S_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_mtb.h b/cpu/samd21/include/instance/instance_mtb.h
index ed60b0d789288bbbfd688ebb4246719f5e2ba0ea..295c15fb16057d640701a17613c61c2d38a8d234 100644
--- a/cpu/samd21/include/instance/instance_mtb.h
+++ b/cpu/samd21/include/instance/instance_mtb.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_MTB_INSTANCE_
#define _SAMR21_MTB_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for MTB peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_MTB_POSITION (0x41006000U) /**< \brief (MTB) MTB Position */
@@ -99,5 +103,8 @@
#define REG_MTB_CID3 (*(RoReg *)0x41006FFCU) /**< \brief (MTB) CoreSight */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#ifdef __cplusplus
+}
+#endif
#endif /* _SAMR21_MTB_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_nvmctrl.h b/cpu/samd21/include/instance/instance_nvmctrl.h
index 4ff83ab23c00e02c419e19c4d513a55a274a2a40..b89c7d2ca5ad9d67a252e73acc07e49c02b5a503 100644
--- a/cpu/samd21/include/instance/instance_nvmctrl.h
+++ b/cpu/samd21/include/instance/instance_nvmctrl.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_NVMCTRL_INSTANCE_
#define _SAMR21_NVMCTRL_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for NVMCTRL peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_NVMCTRL_CTRLA (0x41004000U) /**< \brief (NVMCTRL) Control A */
@@ -89,4 +93,8 @@
#define NVMCTRL_USER_PAGE_OFFSET 0x00800000
#define NVMCTRL_USER_WORD_IMPLEMENTED_MASK 0xC01FFFFFFFFFFFFF
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_NVMCTRL_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_pac0.h b/cpu/samd21/include/instance/instance_pac0.h
index 77bd579d954a415e42005fdb1c1f3da5aa5eb91c..4e0771433588c1eade46ed01b4fb72bcbe71b7ea 100644
--- a/cpu/samd21/include/instance/instance_pac0.h
+++ b/cpu/samd21/include/instance/instance_pac0.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_PAC0_INSTANCE_
#define _SAMR21_PAC0_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for PAC0 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_PAC0_WPCLR (0x40000000U) /**< \brief (PAC0) Write Protection Clear */
@@ -56,4 +60,8 @@
/* ========== Instance parameters for PAC0 peripheral ========== */
#define PAC0_WPROT_DEFAULT_VAL 0x00000000
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_PAC0_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_pac1.h b/cpu/samd21/include/instance/instance_pac1.h
index f9e5bc6176703b424ce109d4bd3c2c16926a7c37..78d2408914c43098ce59f4436752265ec4265840 100644
--- a/cpu/samd21/include/instance/instance_pac1.h
+++ b/cpu/samd21/include/instance/instance_pac1.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_PAC1_INSTANCE_
#define _SAMR21_PAC1_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for PAC1 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_PAC1_WPCLR (0x41000000U) /**< \brief (PAC1) Write Protection Clear */
@@ -56,4 +60,8 @@
/* ========== Instance parameters for PAC1 peripheral ========== */
#define PAC1_WPROT_DEFAULT_VAL 0x00000000
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_PAC1_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_pac2.h b/cpu/samd21/include/instance/instance_pac2.h
index 96baca9a9e441037d643d05631ceb7db4b7c9266..4d3986a8e3bc5ba001ff4ab708ca3f6d6d584cb2 100644
--- a/cpu/samd21/include/instance/instance_pac2.h
+++ b/cpu/samd21/include/instance/instance_pac2.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_PAC2_INSTANCE_
#define _SAMR21_PAC2_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for PAC2 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_PAC2_WPCLR (0x42000000U) /**< \brief (PAC2) Write Protection Clear */
@@ -56,4 +60,8 @@
/* ========== Instance parameters for PAC2 peripheral ========== */
#define PAC2_WPROT_DEFAULT_VAL 0x00800000
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_PAC2_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_pm.h b/cpu/samd21/include/instance/instance_pm.h
index 0b8999dd05190d56dd6d36cb91bbf57246c18103..b221daeaf16a4d9d36f67f1a8b15db95f79e2d86 100644
--- a/cpu/samd21/include/instance/instance_pm.h
+++ b/cpu/samd21/include/instance/instance_pm.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_PM_INSTANCE_
#define _SAMR21_PM_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for PM peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_PM_CTRL (0x40000400U) /**< \brief (PM) Control */
@@ -84,4 +88,8 @@
#define PM_CTRL_MCSEL_XOSC 2
#define PM_PM_CLK_APB_NUM 2
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_PM_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_port.h b/cpu/samd21/include/instance/instance_port.h
index a3dde0b51e8631bc81b33a0581ae15f510041edf..346641d98f641992fb75e8dca53e19d642965921 100644
--- a/cpu/samd21/include/instance/instance_port.h
+++ b/cpu/samd21/include/instance/instance_port.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_PORT_INSTANCE_
#define _SAMR21_PORT_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for PORT peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_PORT_DIR0 (0x41004400U) /**< \brief (PORT) Data Direction 0 */
@@ -159,4 +163,8 @@
#define PORT_SLEWLIM_DEFAULT_VAL { 0x00000000, 0x00000000, 0x00000000 }
#define PORT_SLEWLIM_IMPLEMENTED { 0x00000000, 0x00000000, 0x00000000 }
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_PORT_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_rfctrl.h b/cpu/samd21/include/instance/instance_rfctrl.h
index 147859d84b659fc97c37f8a75cb86ce26b9ac28f..44ecdce79d3062f136fb792ebf84a3ca03d894a7 100644
--- a/cpu/samd21/include/instance/instance_rfctrl.h
+++ b/cpu/samd21/include/instance/instance_rfctrl.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_RFCTRL_INSTANCE_
#define _SAMR21_RFCTRL_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for RFCTRL peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_RFCTRL_FECFG (0x42005400U) /**< \brief (RFCTRL) Front-end control bus configuration */
@@ -54,4 +58,8 @@
/* ========== Instance parameters for RFCTRL peripheral ========== */
#define RFCTRL_FBUSMSB 5
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_RFCTRL_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_rtc.h b/cpu/samd21/include/instance/instance_rtc.h
index edf93ad21d852e92f5764214f0349d4b341de2c7..bd3f95d4b879089259bc6660adb05ce04da681f2 100644
--- a/cpu/samd21/include/instance/instance_rtc.h
+++ b/cpu/samd21/include/instance/instance_rtc.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_RTC_INSTANCE_
#define _SAMR21_RTC_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for RTC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_RTC_READREQ (0x40001402U) /**< \brief (RTC) Read Request */
@@ -114,4 +118,8 @@
#define RTC_NUM_OF_COMP16 RTC_COMP16_NUM
#define RTC_NUM_OF_COMP32 RTC_COMP32_NUM
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_RTC_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_sercom0.h b/cpu/samd21/include/instance/instance_sercom0.h
index 4cc63093f17ce2ae93af45df2390ef29762ccc58..b4fc31278e2c8ad432f333b61eb277624c1ff026 100644
--- a/cpu/samd21/include/instance/instance_sercom0.h
+++ b/cpu/samd21/include/instance/instance_sercom0.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_SERCOM0_INSTANCE_
#define _SAMR21_SERCOM0_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for SERCOM0 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_SERCOM0_I2CM_CTRLA (0x42000800U) /**< \brief (SERCOM0) I2CM Control A */
@@ -140,4 +144,8 @@
#define SERCOM0_GCLK_ID_SLOW 19
#define SERCOM0_INT_MSB 6
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_SERCOM0_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_sercom1.h b/cpu/samd21/include/instance/instance_sercom1.h
index 23ba9d3d8d0cbc1197ba6ebde8d37be746222555..e1ac9049b294ae54526a6b0e990f72d923c6d0cb 100644
--- a/cpu/samd21/include/instance/instance_sercom1.h
+++ b/cpu/samd21/include/instance/instance_sercom1.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_SERCOM1_INSTANCE_
#define _SAMR21_SERCOM1_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for SERCOM1 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_SERCOM1_I2CM_CTRLA (0x42000C00U) /**< \brief (SERCOM1) I2CM Control A */
@@ -140,4 +144,8 @@
#define SERCOM1_GCLK_ID_SLOW 19
#define SERCOM1_INT_MSB 6
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_SERCOM1_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_sercom2.h b/cpu/samd21/include/instance/instance_sercom2.h
index 0c1f0ae58abee747fa9ed2a51a46655408458a9b..57c1876b0a8ead89f084c6675850f0aa5b6d924c 100644
--- a/cpu/samd21/include/instance/instance_sercom2.h
+++ b/cpu/samd21/include/instance/instance_sercom2.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_SERCOM2_INSTANCE_
#define _SAMR21_SERCOM2_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for SERCOM2 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_SERCOM2_I2CM_CTRLA (0x42001000U) /**< \brief (SERCOM2) I2CM Control A */
@@ -140,4 +144,8 @@
#define SERCOM2_GCLK_ID_SLOW 19
#define SERCOM2_INT_MSB 6
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_SERCOM2_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_sercom3.h b/cpu/samd21/include/instance/instance_sercom3.h
index fc540c3c39b2176371d1f492b7494565215e90cb..14f7be90f0435618ee6e66ac6a0dd0149186c4d6 100644
--- a/cpu/samd21/include/instance/instance_sercom3.h
+++ b/cpu/samd21/include/instance/instance_sercom3.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_SERCOM3_INSTANCE_
#define _SAMR21_SERCOM3_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for SERCOM3 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_SERCOM3_I2CM_CTRLA (0x42001400U) /**< \brief (SERCOM3) I2CM Control A */
@@ -140,4 +144,8 @@
#define SERCOM3_GCLK_ID_SLOW 19
#define SERCOM3_INT_MSB 6
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_SERCOM3_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_sercom4.h b/cpu/samd21/include/instance/instance_sercom4.h
index 0f27f91097542359ed09df78e5012851c8f69603..d02a7cc29d285ca44effcafa573d2d31c1e22d3a 100644
--- a/cpu/samd21/include/instance/instance_sercom4.h
+++ b/cpu/samd21/include/instance/instance_sercom4.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_SERCOM4_INSTANCE_
#define _SAMR21_SERCOM4_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for SERCOM4 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_SERCOM4_I2CM_CTRLA (0x42001800U) /**< \brief (SERCOM4) I2CM Control A */
@@ -140,4 +144,8 @@
#define SERCOM4_GCLK_ID_SLOW 19
#define SERCOM4_INT_MSB 6
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_SERCOM4_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_sercom5.h b/cpu/samd21/include/instance/instance_sercom5.h
index 6398dc99e2ac0161b2a49911e398ee6599d2d35a..eb35db608a974a26045ba09fedcf0af9527c069a 100644
--- a/cpu/samd21/include/instance/instance_sercom5.h
+++ b/cpu/samd21/include/instance/instance_sercom5.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_SERCOM5_INSTANCE_
#define _SAMR21_SERCOM5_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for SERCOM5 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_SERCOM5_I2CM_CTRLA (0x42001C00U) /**< \brief (SERCOM5) I2CM Control A */
@@ -140,4 +144,8 @@
#define SERCOM5_GCLK_ID_SLOW 19
#define SERCOM5_INT_MSB 6
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_SERCOM5_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_sysctrl.h b/cpu/samd21/include/instance/instance_sysctrl.h
index f38cf955b20f31267d60796427619e4c1b1a6b6d..d3725ac8a8aa14232cd707553444d5b1de2251ff 100644
--- a/cpu/samd21/include/instance/instance_sysctrl.h
+++ b/cpu/samd21/include/instance/instance_sysctrl.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_SYSCTRL_INSTANCE_
#define _SAMR21_SYSCTRL_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for SYSCTRL peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_SYSCTRL_INTENCLR (0x40000800U) /**< \brief (SYSCTRL) Interrupt Enable Clear */
@@ -117,4 +121,8 @@
#define SYSCTRL_XOSC_VERSION 0x111
#define SYSCTRL_XOSC32K_VERSION 0x111
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_SYSCTRL_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_tc3.h b/cpu/samd21/include/instance/instance_tc3.h
index 8970251af0ad1329aa6cd8191249420f59e9b592..bb3d8523c4f605142463e7c17e644c40c05d848b 100644
--- a/cpu/samd21/include/instance/instance_tc3.h
+++ b/cpu/samd21/include/instance/instance_tc3.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_TC3_INSTANCE_
#define _SAMR21_TC3_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TC3 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TC3_CTRLA (0x42002C00U) /**< \brief (TC3) Control A */
@@ -108,4 +112,8 @@
#define TC3_PERIOD_EXT 0
#define TC3_SHADOW_EXT 0
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_TC3_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_tc4.h b/cpu/samd21/include/instance/instance_tc4.h
index ba8f647c165dfe6086948206c24769653d814b3b..77ba185c3e7af609412def6a20c222ddcaaebe6d 100644
--- a/cpu/samd21/include/instance/instance_tc4.h
+++ b/cpu/samd21/include/instance/instance_tc4.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_TC4_INSTANCE_
#define _SAMR21_TC4_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TC4 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TC4_CTRLA (0x42003000U) /**< \brief (TC4) Control A */
@@ -108,4 +112,8 @@
#define TC4_PERIOD_EXT 0
#define TC4_SHADOW_EXT 0
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_TC4_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_tc5.h b/cpu/samd21/include/instance/instance_tc5.h
index 48c03b4c67414d88c6c93f9a22c2a4d8efef4e19..cf4cd5be0377afa8116020ee4651ab9b71e75ef1 100644
--- a/cpu/samd21/include/instance/instance_tc5.h
+++ b/cpu/samd21/include/instance/instance_tc5.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_TC5_INSTANCE_
#define _SAMR21_TC5_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TC5 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TC5_CTRLA (0x42003400U) /**< \brief (TC5) Control A */
@@ -108,4 +112,8 @@
#define TC5_PERIOD_EXT 0
#define TC5_SHADOW_EXT 0
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_TC5_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_tc6.h b/cpu/samd21/include/instance/instance_tc6.h
index 70d7428fcf595ba2410e2900157d8ff7a3936b08..66a2c22957857a09337501f48a6b2cc5352b57bb 100644
--- a/cpu/samd21/include/instance/instance_tc6.h
+++ b/cpu/samd21/include/instance/instance_tc6.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_TC6_INSTANCE_
#define _SAMR21_TC6_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TC6 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TC6_CTRLA (0x42003800U) /**< \brief (TC6) Control A */
@@ -108,4 +112,8 @@
#define TC6_PERIOD_EXT 0
#define TC6_SHADOW_EXT 0
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_TC6_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_tc7.h b/cpu/samd21/include/instance/instance_tc7.h
index a7bcab9ea8917da671124f3e861f5682a743d8ef..53ab6050b1f7855f01705912ca2741dee6e33e32 100644
--- a/cpu/samd21/include/instance/instance_tc7.h
+++ b/cpu/samd21/include/instance/instance_tc7.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_TC7_INSTANCE_
#define _SAMR21_TC7_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TC7 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TC7_CTRLA (0x42003C00U) /**< \brief (TC7) Control A */
@@ -108,4 +112,8 @@
#define TC7_PERIOD_EXT 0
#define TC7_SHADOW_EXT 0
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_TC7_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_tcc0.h b/cpu/samd21/include/instance/instance_tcc0.h
index 858b55eaf71ed533ce5b016da384045af209e5ed..b16c25f12dbf5fa5d873e28a172449041557359f 100644
--- a/cpu/samd21/include/instance/instance_tcc0.h
+++ b/cpu/samd21/include/instance/instance_tcc0.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_TCC0_INSTANCE_
#define _SAMR21_TCC0_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TCC0 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TCC0_CTRLA (0x42002000U) /**< \brief (TCC0) Control A */
@@ -128,4 +132,8 @@
#define TCC0_SIZE 24
#define TCC0_SWAP 1
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_TCC0_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_tcc1.h b/cpu/samd21/include/instance/instance_tcc1.h
index db32a659141924f12b49debf7edce1fccc143ad0..8406aed03a9cd9a3f4a50bb42d016c04e985f0d7 100644
--- a/cpu/samd21/include/instance/instance_tcc1.h
+++ b/cpu/samd21/include/instance/instance_tcc1.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_TCC1_INSTANCE_
#define _SAMR21_TCC1_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TCC1 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TCC1_CTRLA (0x42002400U) /**< \brief (TCC1) Control A */
@@ -116,4 +120,8 @@
#define TCC1_SIZE 24
#define TCC1_SWAP 0
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_TCC1_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_tcc2.h b/cpu/samd21/include/instance/instance_tcc2.h
index 0ca2925e93aaa936add45539d0fcdd31c0e06e8d..e0ef2a7459627be2a228f61e89476e2d314caf8a 100644
--- a/cpu/samd21/include/instance/instance_tcc2.h
+++ b/cpu/samd21/include/instance/instance_tcc2.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_TCC2_INSTANCE_
#define _SAMR21_TCC2_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for TCC2 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_TCC2_CTRLA (0x42002800U) /**< \brief (TCC2) Control A */
@@ -112,4 +116,8 @@
#define TCC2_SIZE 16
#define TCC2_SWAP 0
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_TCC2_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_usb.h b/cpu/samd21/include/instance/instance_usb.h
index 51461bd029e10dd49f503336e9bc998284023671..7ce50e26a4eb24d2cc74dda74c6de7f0d929aa69 100644
--- a/cpu/samd21/include/instance/instance_usb.h
+++ b/cpu/samd21/include/instance/instance_usb.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_USB_INSTANCE_
#define _SAMR21_USB_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for USB peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_USB_CTRLA (0x41005000U) /**< \brief (USB) Control A */
@@ -339,4 +343,8 @@
#define USB_GCLK_ID 6
#define USB_PIPE_NUM 8
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_USB_INSTANCE_ */
diff --git a/cpu/samd21/include/instance/instance_wdt.h b/cpu/samd21/include/instance/instance_wdt.h
index d9dd85bc62561e11d1fb0756a48a562a62377e85..f47a71a6e57789ee10ce098023c37dd6c42ea560 100644
--- a/cpu/samd21/include/instance/instance_wdt.h
+++ b/cpu/samd21/include/instance/instance_wdt.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21_WDT_INSTANCE_
#define _SAMR21_WDT_INSTANCE_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* ========== Register definition for WDT peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_WDT_CTRL (0x40001000U) /**< \brief (WDT) Control */
@@ -68,4 +72,8 @@
/* ========== Instance parameters for WDT peripheral ========== */
#define WDT_GCLK_ID 3
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21_WDT_INSTANCE_ */
diff --git a/cpu/samd21/include/pio/pio_samr21g18a.h b/cpu/samd21/include/pio/pio_samr21g18a.h
index c5b6e7615865d01e4bc2b92c3ab981f23145551f..2949cd68c93ce5ba5f02b8277aa21495733528b9 100644
--- a/cpu/samd21/include/pio/pio_samr21g18a.h
+++ b/cpu/samd21/include/pio/pio_samr21g18a.h
@@ -44,6 +44,10 @@
#ifndef _SAMR21G18A_PIO_
#define _SAMR21G18A_PIO_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define PIN_PA00 0 /**< \brief Pin Number for PA00 */
#define PORT_PA00 (1u << 0) /**< \brief PORT Mask for PA00 */
#define PIN_PA01 1 /**< \brief Pin Number for PA01 */
@@ -1006,4 +1010,8 @@
#define PINMUX_PA15F_RFCTRL_FECTRL5 ((PIN_PA15F_RFCTRL_FECTRL5 << 16) | MUX_PA15F_RFCTRL_FECTRL5)
#define PORT_PA15F_RFCTRL_FECTRL5 (1u << 15)
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _SAMR21G18A_PIO_ */
diff --git a/cpu/samd21/include/samd21.h b/cpu/samd21/include/samd21.h
index d7bc359131b78211fbbe2a760120773b3dc7ce95..805b01e76efe230f87d50a6c24c61b43fb08b0f1 100644
--- a/cpu/samd21/include/samd21.h
+++ b/cpu/samd21/include/samd21.h
@@ -55,12 +55,13 @@
*/
/*@{*/
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#include <stdint.h>
+
#ifdef __cplusplus
extern "C" {
#endif
-#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
-#include <stdint.h>
#ifndef __cplusplus
typedef volatile const uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */
typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
@@ -237,6 +238,10 @@ void I2S_Handler ( void );
* \brief CMSIS includes
*/
+#ifdef __cplusplus
+}
+#endif
+
#include <core_cm0plus.h>
#if !defined DONT_USE_CMSIS_INIT
#include "system_samd21.h"
@@ -542,11 +547,6 @@ void I2S_Handler ( void );
/** ELECTRICAL DEFINITIONS FOR SAMR21G18A */
/* ************************************************************************** */
-
-#ifdef __cplusplus
-}
-#endif
-
/*@}*/
#endif /* SAMR21G18A_H */
diff --git a/cpu/stm32f0/include/cpu-conf.h b/cpu/stm32f0/include/cpu-conf.h
index e7e89aa21308b894037f951df874ac790a2c373b..cafe961872cc9bb671a1a09888bd0594dd8914e5 100644
--- a/cpu/stm32f0/include/cpu-conf.h
+++ b/cpu/stm32f0/include/cpu-conf.h
@@ -25,6 +25,9 @@
#include "stm32f051x8.h"
#endif
+#ifdef __cplusplus
+extern "C" {
+#endif
/**
* @name Kernel configuration
@@ -55,5 +58,9 @@
#endif
/** @} */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __CPU_CONF_H */
/** @} */
diff --git a/cpu/stm32f0/include/hwtimer_cpu.h b/cpu/stm32f0/include/hwtimer_cpu.h
index b8a8049338300f9261bcf57b721cd484374d7633..75bf11fa5ecfab4de0b25274daaee6ab823dfc19 100644
--- a/cpu/stm32f0/include/hwtimer_cpu.h
+++ b/cpu/stm32f0/include/hwtimer_cpu.h
@@ -19,6 +19,10 @@
#ifndef __HWTIMER_CPU_H
#define __HWTIMER_CPU_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @name Hardware timer configuration
* @{
@@ -28,5 +32,9 @@
#define HWTIMER_MAXTICKS (0xFFFFFFFF) /**< 32-bit timer */
/** @} */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __HWTIMER_CPU_H */
/** @} */
diff --git a/cpu/stm32f1/include/cpu-conf.h b/cpu/stm32f1/include/cpu-conf.h
index 7919efea5295b5f2997d3f385b4cdc130022f485..d60bafe135bce29f7c17ca45c663c9c9fe9f8b4b 100644
--- a/cpu/stm32f1/include/cpu-conf.h
+++ b/cpu/stm32f1/include/cpu-conf.h
@@ -25,6 +25,10 @@
#include "stm32f10x.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @name Kernel configuration
*
@@ -71,5 +75,9 @@ void cpu_clock_scale(uint32_t source, uint32_t target, uint32_t *prescale);
#define TRANSCEIVER_BUFFER_SIZE (3)
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __CPU_CONF_H */
/** @} */
diff --git a/cpu/stm32f1/include/hwtimer_cpu.h b/cpu/stm32f1/include/hwtimer_cpu.h
index 6af375c721dc12b2671761149af2233ae18b9337..aa789a8bda15178894402370c2103c0c60a0ab7f 100644
--- a/cpu/stm32f1/include/hwtimer_cpu.h
+++ b/cpu/stm32f1/include/hwtimer_cpu.h
@@ -19,6 +19,10 @@
#ifndef HWTIMER_CPU_H_
#define HWTIMER_CPU_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @name Hardware timer configuration
* @{
@@ -29,5 +33,9 @@
#define HWTIMER_WAIT_OVERHEAD (3)
/** @} */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* HWTIMER_CPU_H_ */
/** @} */
diff --git a/cpu/stm32f1/include/stm32f10x.h b/cpu/stm32f1/include/stm32f10x.h
index 1dbc05d56540b93172d1ce7d2430d6371a715346..69b50baa27bf0376cc20857c4b2450414f0ec94f 100644
--- a/cpu/stm32f1/include/stm32f10x.h
+++ b/cpu/stm32f1/include/stm32f10x.h
@@ -477,9 +477,17 @@ typedef enum IRQn
* @}
*/
+#ifdef __cplusplus
+}
+#endif
+
#include "core_cm3.h"
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/** @addtogroup cpu_specific_Exported_types
* @{
*/
@@ -8294,10 +8302,18 @@ typedef struct
* @}
*/
+#ifdef __cplusplus
+}
+#endif
+
#ifdef USE_STDPERIPH_DRIVER
#include "stm32f10x_conf.h"
#endif
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/** @addtogroup cpu_specific_Exported_macro
* @{
*/
diff --git a/cpu/stm32f3/include/cpu-conf.h b/cpu/stm32f3/include/cpu-conf.h
index bae8ac40ad8fe7488df3ba7a4083b8d39304c2ca..c32b4c577b9baa2262084768f1ca1aee987f0270 100644
--- a/cpu/stm32f3/include/cpu-conf.h
+++ b/cpu/stm32f3/include/cpu-conf.h
@@ -51,5 +51,13 @@
#endif
/** @} */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __CPU_CONF_H */
/** @} */
diff --git a/cpu/stm32f3/include/hwtimer_cpu.h b/cpu/stm32f3/include/hwtimer_cpu.h
index bd36f3851a78495e1a8c76316b8fbb026c2cf27c..ca3157f6254987e0224bec6d526b3a1f8a0674b8 100644
--- a/cpu/stm32f3/include/hwtimer_cpu.h
+++ b/cpu/stm32f3/include/hwtimer_cpu.h
@@ -19,6 +19,10 @@
#ifndef __HWTIMER_CPU_H
#define __HWTIMER_CPU_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @name Hardware timer configuration
* @{
@@ -28,5 +32,9 @@
#define HWTIMER_MAXTICKS (0xFFFFFFFF) /**< 32-bit timer */
/** @} */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __HWTIMER_CPU_H */
/** @} */
diff --git a/cpu/stm32f4/include/cpu-conf.h b/cpu/stm32f4/include/cpu-conf.h
index 0bcc4308904513d3d762e66845c6d10b5a1091a1..a5a08691a755cf9de2e3d3c20b48c02a414c972b 100644
--- a/cpu/stm32f4/include/cpu-conf.h
+++ b/cpu/stm32f4/include/cpu-conf.h
@@ -53,5 +53,13 @@
#endif
/** @} */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __CPU_CONF_H */
/** @} */
diff --git a/cpu/stm32f4/include/hwtimer_cpu.h b/cpu/stm32f4/include/hwtimer_cpu.h
index 498cb7864781fb50af48c801d7bb889027853ee2..eb495bc3cc57400095c63ded8168c720daec2737 100644
--- a/cpu/stm32f4/include/hwtimer_cpu.h
+++ b/cpu/stm32f4/include/hwtimer_cpu.h
@@ -19,6 +19,10 @@
#ifndef __HWTIMER_CPU_H
#define __HWTIMER_CPU_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @name Hardware timer configuration
* @{
@@ -28,5 +32,9 @@
#define HWTIMER_MAXTICKS (0xFFFFFFFF) /**< 32-bit timer */
/** @} */
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __HWTIMER_CPU_H */
/** @} */
diff --git a/cpu/x86/include/cpu.h b/cpu/x86/include/cpu.h
index c2c78c6201bfb30289cf305d841695c8cdfa34ce..f8eb6e6cde1dfb8275c80512bb5ded05f77224e0 100644
--- a/cpu/x86/include/cpu.h
+++ b/cpu/x86/include/cpu.h
@@ -39,6 +39,10 @@
#include <stdio.h>
#include <stdlib.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
static inline void __attribute__((always_inline)) dINT(void)
{
asm volatile ("cli");
@@ -116,6 +120,10 @@ void x86_init_board(void);
*/
bool x86_get_memory_region(uint64_t *start, uint64_t *len, unsigned long *cnt);
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/hwtimer_cpu.h b/cpu/x86/include/hwtimer_cpu.h
index f1872ab092e2e41186c55df4c6c4373819440bce..6840f622ea21879a9e5af94325fd122476b6b7e8 100644
--- a/cpu/x86/include/hwtimer_cpu.h
+++ b/cpu/x86/include/hwtimer_cpu.h
@@ -29,6 +29,10 @@
#ifndef CPU__X86__HWTIMER_CPU__H__
#define CPU__X86__HWTIMER_CPU__H__
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief Number of configured hardware timers.
*
@@ -53,6 +57,10 @@
*/
#define HWTIMER_MAXTICKS (0xFFFFFFFFu)
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/ucontext.h b/cpu/x86/include/ucontext.h
index c9d572cb0d7452c3366a67fd97cc00b6e3fd1593..ef1c42a88edfc008ee3eb68957b46f0b3552d6c8 100644
--- a/cpu/x86/include/ucontext.h
+++ b/cpu/x86/include/ucontext.h
@@ -31,6 +31,10 @@
#include <stdlib.h>
#include <unistd.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief Common stacksize for a signal handler.
*
@@ -161,6 +165,10 @@ void makecontext(ucontext_t *ucp, makecontext_fun_t func, int argc, ...);
*/
int swapcontext(ucontext_t *oucp, const ucontext_t *ucp);
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_cmos.h b/cpu/x86/include/x86_cmos.h
index 7aef69de2987dfd88c5188cc508136e9e31048c6..e8de2ab0aa4abaa8b677a7d9bb0e78b426e9ed86 100644
--- a/cpu/x86/include/x86_cmos.h
+++ b/cpu/x86/include/x86_cmos.h
@@ -32,6 +32,10 @@
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define CMOS_ADDRESS (0x70)
#define CMOS_DATA (0x71)
@@ -58,6 +62,10 @@ void x86_cmos_write(int reg, uint8_t value);
*/
void x86_cmos_serial(uint8_t (*serial)[CMOS_SERIAL_LEN]);
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_hwtimer.h b/cpu/x86/include/x86_hwtimer.h
index 138a28461f5a9cb9469824f75e395b44eb2e8fd5..f1175df8e5c6c5a0a73c49f407dcad3c1ba18777 100644
--- a/cpu/x86/include/x86_hwtimer.h
+++ b/cpu/x86/include/x86_hwtimer.h
@@ -29,6 +29,10 @@
#ifndef CPU__X86__HWTIMER__H__
#define CPU__X86__HWTIMER__H__
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief Do timestamping to enable the use of the hwtimer module.
*
@@ -37,6 +41,10 @@
*/
void x86_init_hwtimer(void);
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_interrupts.h b/cpu/x86/include/x86_interrupts.h
index 7a1ae7a2f2bbf0fef4e114be214eba3b8d729ece..eb46c573a7273d19380c0633beee8b3843335ee6 100644
--- a/cpu/x86/include/x86_interrupts.h
+++ b/cpu/x86/include/x86_interrupts.h
@@ -33,6 +33,10 @@
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief Initialize interrupts.
*
@@ -152,6 +156,10 @@ static inline void __attribute__((always_inline)) x86_restore_flags(unsigned lon
*/
void x86_print_registers(struct x86_pushad *orig_ctx, unsigned long error_code);
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_kernel_memory.h b/cpu/x86/include/x86_kernel_memory.h
index b9cf1032b327465bc95472b920794d6e1a2b975f..8c86abe5694033aab58d4f129d0964ffa1e7cfba 100644
--- a/cpu/x86/include/x86_kernel_memory.h
+++ b/cpu/x86/include/x86_kernel_memory.h
@@ -28,6 +28,10 @@
#ifndef KERNEL_MEMORY_H__
#define KERNEL_MEMORY_H__
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief First byte inside the elf segments.
*
@@ -111,6 +115,10 @@ extern char _kernel_memory_end;
*/
extern char _heap_start;
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_memory.h b/cpu/x86/include/x86_memory.h
index 23ef3c661d3a1640ca37b2d4d97a9a645e85ca9a..b9bb81352f8ff20d40e0a53aec9303af67d3b0c8 100644
--- a/cpu/x86/include/x86_memory.h
+++ b/cpu/x86/include/x86_memory.h
@@ -31,6 +31,10 @@
#include <stdbool.h>
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief Maximum static size of the kernel.
*
@@ -170,6 +174,10 @@ void x86_release_virtual_pages(uint32_t virtual_start, unsigned pages);
*/
void x86_init_gdt(void);
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_pci.h b/cpu/x86/include/x86_pci.h
index 146ddf7dd5d7a6a168f8ca1d03ffcd6102fed342..0c41e9773a9007f7a9c60ba1262fc32484161dca 100644
--- a/cpu/x86/include/x86_pci.h
+++ b/cpu/x86/include/x86_pci.h
@@ -35,6 +35,10 @@
#include <stdbool.h>
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief Initialize the Peripheral Component Interconnect.
*
@@ -410,6 +414,10 @@ void x86_pci_write16(unsigned bus, unsigned dev, unsigned fun, unsigned reg, uin
*/
void x86_pci_set_irq(struct x86_known_pci_device *d, uint8_t irq_num);
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_pci_init.h b/cpu/x86/include/x86_pci_init.h
index 3dd4e59fd3930d7ba2a24fba780d51d312771d87..71ce5af20ecafb84bb2bf6c5901831b08d5ea15f 100644
--- a/cpu/x86/include/x86_pci_init.h
+++ b/cpu/x86/include/x86_pci_init.h
@@ -19,8 +19,16 @@
#ifndef __X86__PCI_INIT__H
#define __X86__PCI_INIT__H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* no PCI devices are implemented, yet */
void x86_init_pci_devices(void);
+#ifdef __cplusplus
+}
+#endif
+
#endif
diff --git a/cpu/x86/include/x86_pci_strings.h b/cpu/x86/include/x86_pci_strings.h
index f0b4efa38ea5fad22b13dc71e2e997f74520a4ba..b34a3be4d72c938fb237e67854ca13319b18b5e2 100644
--- a/cpu/x86/include/x86_pci_strings.h
+++ b/cpu/x86/include/x86_pci_strings.h
@@ -28,6 +28,10 @@
#ifndef CPU__X86__PCI_NAMES__H__
#define CPU__X86__PCI_NAMES__H__
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief Get a string representation of the device class.
* @param[out] baseclass_name Name of the base class. Supply NULL if you do not care.
@@ -48,6 +52,10 @@ const char *x86_pci_subclass_to_string(unsigned baseclass, unsigned subclass, un
*/
const char *x86_pci_device_id_to_string(unsigned vendor_id, unsigned device_id, const char **vendor_name);
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_pic.h b/cpu/x86/include/x86_pic.h
index d381a46475bd8d2f45881f2fc0d9883d6d240003..1f835952870e46dcd4981db391cee315a2ec55f6 100644
--- a/cpu/x86/include/x86_pic.h
+++ b/cpu/x86/include/x86_pic.h
@@ -30,6 +30,10 @@
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief Initialize the Programmable Interrupt Controller.
*
@@ -163,6 +167,10 @@ void x86_pic_enable_irq(unsigned num);
*/
void x86_pic_disable_irq(unsigned num);
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_pit.h b/cpu/x86/include/x86_pit.h
index a2d88dee778c9cb9ec11b0b5bbf089f38301a81a..44d441a7c7a9a7d4f47eadb583fcaa890fa9a4ed 100644
--- a/cpu/x86/include/x86_pit.h
+++ b/cpu/x86/include/x86_pit.h
@@ -37,6 +37,10 @@
#include <stdbool.h>
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define PIT_CHANNEL_0_PORT (0x40) /**< Channel 0 */
#define PIT_CHANNEL_1_PORT (0x41) /**< Channel 1, DO NOT USE */
#define PIT_CHANNEL_2_PORT (0x42) /**< Channel 2, do not use if you can help it */
@@ -109,6 +113,10 @@ void x86_pit_set2(unsigned channel, unsigned mode, uint16_t max);
*/
bool x86_pit_set(unsigned channel, unsigned mode, unsigned hz);
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_ports.h b/cpu/x86/include/x86_ports.h
index 364b89f5037b9c7e512ca0f79652013360d397c1..c4fbc8e8104d41f0c45bf5af0f398286ff785d4f 100644
--- a/cpu/x86/include/x86_ports.h
+++ b/cpu/x86/include/x86_ports.h
@@ -29,6 +29,10 @@
#include <stdlib.h>
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief Reads and returns a byte from PORT.
* @param[in] port Port to read from.
@@ -183,4 +187,8 @@ static inline void __attribute__((always_inline)) io_wait(void)
"2:");
}
+#ifdef __cplusplus
+}
+#endif
+
#endif
diff --git a/cpu/x86/include/x86_reboot.h b/cpu/x86/include/x86_reboot.h
index ae7077888aac4502e74b634bc3777636944c3aa8..a2785118d12ef728745e6ace5516fafd236c3051 100644
--- a/cpu/x86/include/x86_reboot.h
+++ b/cpu/x86/include/x86_reboot.h
@@ -30,6 +30,10 @@
#include "kernel.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief Prototype for a x86 reboot function.
*
@@ -84,6 +88,10 @@ bool x86_shutdown(void);
*/
void x86_set_shutdown_fun(x86_shutdown_t fun);
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_registers.h b/cpu/x86/include/x86_registers.h
index f84b2b18fe1a978099ed4db3e32c4b8497d670ab..08095800820e84a09be6e055d6e336ec1a654c6f 100644
--- a/cpu/x86/include/x86_registers.h
+++ b/cpu/x86/include/x86_registers.h
@@ -30,6 +30,10 @@
#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* see "Intel® Quark SoC X1000 Core Developer’s Manual", § 4.4.1.1 (p. 47) */
#define CR0_PE (1u << 0) /**< 1 = protected mode */
#define CR0_MP (1u << 1) /**< 1 = monitor coprocessor (FWAIT causes an interrupt) */
@@ -247,6 +251,10 @@ static inline uint64_t X86_CR_ATTR cpuid_caps(void)
return ((uint64_t) ecx << 32) | edx;
}
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_rtc.h b/cpu/x86/include/x86_rtc.h
index 2024d411fdf67fa91a7d70bad26a263522882104..48abbd716b31fdefb510748d39e7f7791666ed60 100644
--- a/cpu/x86/include/x86_rtc.h
+++ b/cpu/x86/include/x86_rtc.h
@@ -36,6 +36,10 @@
#include <stdbool.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief A timestamp.
*
@@ -206,6 +210,10 @@ void x86_rtc_set_periodic_callback(x86_rtc_callback_t cb);
*/
void x86_rtc_set_update_callback(x86_rtc_callback_t cb);
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_threading.h b/cpu/x86/include/x86_threading.h
index 9c6c1da89f13e2068cd75bd010c61775419e4ee0..496a6bd02c93dc0ae8d4ea1d9b309bbb87d9f1b0 100644
--- a/cpu/x86/include/x86_threading.h
+++ b/cpu/x86/include/x86_threading.h
@@ -31,6 +31,10 @@
#include <stdbool.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief Initialize threading.
*
@@ -44,6 +48,10 @@ void x86_init_threading(void);
*/
extern bool x86_in_isr;
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_uart.h b/cpu/x86/include/x86_uart.h
index 48be9d10da963aa39a803e31c8311ea68cc6c9a8..0ac0cfb4bbc13446ce3901ca4463b0e4cc06d1d9 100644
--- a/cpu/x86/include/x86_uart.h
+++ b/cpu/x86/include/x86_uart.h
@@ -35,6 +35,10 @@
#include <stdlib.h>
#include <unistd.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief Early initialization of the UART system, before there are interrupts.
*
@@ -171,6 +175,10 @@ enum iir_t {
IIR_FIFO_ENABLED = 3 << 6, /* FIFO enabled */
};
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */
diff --git a/cpu/x86/include/x86_videoram.h b/cpu/x86/include/x86_videoram.h
index 371f41026eaed37d774e949afd42e961ffd63d22..4d21fab1d915929eece315ae6ef6b99934c54527 100644
--- a/cpu/x86/include/x86_videoram.h
+++ b/cpu/x86/include/x86_videoram.h
@@ -28,6 +28,10 @@
#ifndef CPU__X86__VIDEORAM_H__
#define CPU__X86__VIDEORAM_H__
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/**
* @brief Print out a single character on the graphical device.
*
@@ -57,6 +61,10 @@ void videoram_puts(const char *s);
*/
void videoram_put_hex(unsigned long v);
+#ifdef __cplusplus
+}
+#endif
+
#endif
/** @} */