diff --git a/core/include/arch/irq_arch.h b/core/include/arch/irq_arch.h
deleted file mode 100644
index 306aac3a3ade584a11ec6d5b9ff989c4f58af2d8..0000000000000000000000000000000000000000
--- a/core/include/arch/irq_arch.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (C) 2014 Freie Universität Berlin
- *
- * This file is subject to the terms and conditions of the GNU Lesser
- * General Public License v2.1. See the file LICENSE in the top level
- * directory for more details.
- */
-
-/**
- * @ingroup     core_arch
- * @{
- *
- * @file
- * @brief       Interrupt handling interface for globally en- and disabling interrupts
- *
- * This file acts as a wrapper between the kernels interrupt interface and the architecture
- * dependent implementation of the interfaces.
- *
- * @note All functions in this module have to be implemented in a way that it
- *       is safe to call them from within the context of an ISR.
- *
- * @author      Hauke Petersen <hauke.petersen@fu-berlin.de>
- */
-
-#ifndef ARCH_IRQ_ARCH_H
-#define ARCH_IRQ_ARCH_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- * @name Define mapping between kernel internal and arch interfaces
- *
- * This mapping is done for compatibility of existing platforms,
- * new platforms should always use the *_arch_* interfaces.
- * @{
- */
-#ifdef COREIF_NG
-#define irq_enable      irq_arch_enable
-#define irq_disable     irq_arch_disable
-#define irq_restore     irq_arch_restore
-#define irq_is_in       irq_arch_in
-#endif
-/** @} */
-
-/**
- * @brief Globally enable maskable interrupt sources
- *
- * @return              the IRQ state after enabling interrupts
- */
-unsigned int irq_arch_enable(void);
-
-/**
- * @brief Globally disable all maskable interrupt sources
- *
- * @return              the IRQ state before disabling interrupts
- */
-unsigned int irq_arch_disable(void);
-
-
-/**
- * @brief Restore a previously recorded IRQ state
- *
- * @param[in] state     the state to set the IRQ flags to
- */
-void irq_arch_restore(unsigned int state);
-
-/**
- * @brief See if the current context is inside an ISR
- *
- * @return              1 if currently in interrupt context, 0 otherwise
- */
-int irq_arch_in(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ARCH_IRQ_ARCH_H */
-/** @} */
diff --git a/core/include/arch/panic_arch.h b/core/include/arch/panic_arch.h
deleted file mode 100644
index f103239b4d2c55c38ad88574db9610dedd9a990e..0000000000000000000000000000000000000000
--- a/core/include/arch/panic_arch.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (C) 2015 INRIA
- *
- * This file is subject to the terms and conditions of the GNU Lesser
- * General Public License v2.1. See the file LICENSE in the top level
- * directory for more details.
- */
-
-/**
- * @ingroup     core_arch
- * @{
- *
- * @file
- * @brief       Architecture dependent panic function
- *
- * @author      Oliver Hahm <oliver.hahm@inria.fr>
- */
-
-#ifndef ARCH_PANIC_ARCH_H
-#define ARCH_PANIC_ARCH_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
- /**
-  * @brief architecture dependent handling of an panic case
-  *
-  * This function gives the CPU the possibility to execute architecture
-  * dependent code in case of an severe error.
-  */
-void panic_arch(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ARCH_PANIC_ARCH_H */
-/** @} */
diff --git a/core/include/arch/thread_arch.h b/core/include/arch/thread_arch.h
deleted file mode 100644
index 40ced5702788b47443f627641b53b175b2469b1e..0000000000000000000000000000000000000000
--- a/core/include/arch/thread_arch.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * Copyright (C) 2014 Freie Universität Berlin
- *
- * This file is subject to the terms and conditions of the GNU Lesser
- * General Public License v2.1. See the file LICENSE in the top level
- * directory for more details.
- */
-
-/**
- * @ingroup     core_arch
- * @{
- *
- * @file
- * @brief       Architecture dependent kernel interface for handling and managing threads
- *
- * @author      Hauke Petersen <hauke.petersen@fu-berlin.de>
- */
-
-#ifndef ARCH_THREAD_ARCH_H
-#define ARCH_THREAD_ARCH_H
-
-#include "kernel_defines.h"
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- * @name Define the mapping between the architecture independent interfaces
- *       and the kernel internal interfaces
- *
- * This mapping is done for compatibility of existing platforms,
- * new platforms should always use the *_arch_* interfaces.
- * @{
- */
-#ifdef COREIF_NG
-#define thread_stack_init               thread_arch_stack_init
-#define thread_print_stack              thread_arch_stack_print
-#define cpu_switch_context_exit         thread_arch_start_threading
-#define thread_yield_higher             thread_arch_yield
-#endif
-/** @} */
-
-/**
- * @brief Prototype for a thread entry function
- */
-typedef void *(*thread_task_func_t)(void *arg);
-
-/**
- * @brief Initialize a thread's stack
- *
- * @param[in] task_func     pointer to the thread's code
- * @param[in] arg           argument to task_func
- * @param[in] stack_start   pointer to the start address of the thread
- * @param[in] stack_size    the maximum size of the stack
- *
- * @return                  pointer to the new top of the stack
- */
-char *thread_arch_stack_init(thread_task_func_t task_func, void *arg, void *stack_start, int stack_size);
-
-/**
- * @brief   Get the number of bytes used on the ISR stack
- */
-int thread_arch_isr_stack_usage(void);
-
-/**
- * @brief   Get the current ISR stack pointer
- */
-void *thread_arch_isr_stack_pointer(void);
-
-/**
- * @brief   Get the start of the ISR stack
- */
-void *thread_arch_isr_stack_start(void);
-
-/**
- * @brief Print the current stack to stdout
- */
-void thread_arch_stack_print(void);
-
-/**
- * @brief Start threading by loading a threads initial information from the stack
- */
-void thread_arch_start_threading(void) NORETURN;
-
-/**
- * @brief Pause the current thread and schedule the next pending, if available
- */
-void thread_arch_yield(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ARCH_THREAD_ARCH_H */
-/** @} */
diff --git a/core/include/irq.h b/core/include/irq.h
index 048a9ed47236c67c661335080cab659c3872925c..29a969a02389c3603bfab0052f9cd60c451521fe 100644
--- a/core/include/irq.h
+++ b/core/include/irq.h
@@ -22,7 +22,6 @@
 #define IRQ_H
 
 #include <stdbool.h>
-#include "arch/irq_arch.h"
 
 #ifdef __cplusplus
  extern "C" {
diff --git a/core/include/panic.h b/core/include/panic.h
index 5d10aab62497d786e937a8e9520413953cbee3a5..79ea9071173c6fbb776236493d7ef28a3e7ec912 100644
--- a/core/include/panic.h
+++ b/core/include/panic.h
@@ -74,6 +74,14 @@ typedef enum {
  * */
 NORETURN void core_panic(core_panic_t crash_code, const char *message);
 
+/**
+ * @brief architecture dependent handling of a panic case
+ *
+ * This function gives the CPU the possibility to execute architecture
+ * dependent code in case of a severe error.
+ */
+void panic_arch(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/core/include/thread.h b/core/include/thread.h
index 00223e239699d67b3d5cf84e08d1c88c832e0863..dfa9a4fdeee1416b52646b243117486ef5065791 100644
--- a/core/include/thread.h
+++ b/core/include/thread.h
@@ -122,7 +122,6 @@
 #include "clist.h"
 #include "cib.h"
 #include "msg.h"
-#include "arch/thread_arch.h"
 #include "cpu_conf.h"
 #include "sched.h"
 
@@ -167,6 +166,11 @@
 #define STATUS_PENDING         10               /**< waiting to be scheduled to run     */
 /** @} */
 
+/**
+ * @brief Prototype for a thread entry function
+ */
+typedef void *(*thread_task_func_t)(void *arg);
+
 /**
  * @brief @c thread_t holds thread's context data.
  */
@@ -462,6 +466,26 @@ const char *thread_getname(kernel_pid_t pid);
 uintptr_t thread_measure_stack_free(char *stack);
 #endif /* DEVELHELP */
 
+/**
+ * @brief   Get the number of bytes used on the ISR stack
+ */
+int thread_isr_stack_usage(void);
+
+/**
+ * @brief   Get the current ISR stack pointer
+ */
+void *thread_isr_stack_pointer(void);
+
+/**
+ * @brief   Get the start of the ISR stack
+ */
+void *thread_isr_stack_start(void);
+
+/**
+ * @brief Print the current stack to stdout
+ */
+void thread_stack_print(void);
+
 /**
  * @brief   Prints human readable, ps-like thread information for debugging purposes
  */
diff --git a/core/panic.c b/core/panic.c
index d3052ab0e77a19bd11275a74ecd8e8777252c975..d107d8f36c5a99ed47a314422d36bdaa3612bed5 100644
--- a/core/panic.c
+++ b/core/panic.c
@@ -29,7 +29,6 @@
 #include "cpu.h"
 #include "irq.h"
 #include "panic.h"
-#include "arch/panic_arch.h"
 #include "periph/pm.h"
 #include "log.h"
 
diff --git a/cpu/atmega1281/Makefile.include b/cpu/atmega1281/Makefile.include
index 730032146747fd66330ba8fd6d9db27e26c89b4d..6647a8d437943e6c87fad2c38182ba324f8afa9e 100644
--- a/cpu/atmega1281/Makefile.include
+++ b/cpu/atmega1281/Makefile.include
@@ -1,6 +1,3 @@
-# this CPU implementation is using the new core/CPU interface
-export CFLAGS += -DCOREIF_NG=1
-
 # tell the build system that the CPU depends on the atmega common files
 USEMODULE += atmega_common
 
diff --git a/cpu/atmega2560/Makefile.include b/cpu/atmega2560/Makefile.include
index 730032146747fd66330ba8fd6d9db27e26c89b4d..6647a8d437943e6c87fad2c38182ba324f8afa9e 100644
--- a/cpu/atmega2560/Makefile.include
+++ b/cpu/atmega2560/Makefile.include
@@ -1,6 +1,3 @@
-# this CPU implementation is using the new core/CPU interface
-export CFLAGS += -DCOREIF_NG=1
-
 # tell the build system that the CPU depends on the atmega common files
 USEMODULE += atmega_common
 
diff --git a/cpu/atmega328p/Makefile.include b/cpu/atmega328p/Makefile.include
index a952b7caeff17fef7a5eb622688eed8e5294cadd..b46d4e871c8f7be91fa4f2bae002050a124562cf 100644
--- a/cpu/atmega328p/Makefile.include
+++ b/cpu/atmega328p/Makefile.include
@@ -1,6 +1,3 @@
-# this CPU implementation is using the new core/CPU interface
-export CFLAGS += -DCOREIF_NG=1
-
 # tell the build system that the CPU depends on the atmega common files
 USEMODULE += atmega_common
 
diff --git a/cpu/atmega_common/irq_arch.c b/cpu/atmega_common/irq_arch.c
index 443b507ff89f48211f74f707e14be3e5d93d39e0..3d50aa5ee76ae65fdef459967afe2870a3ea50f4 100644
--- a/cpu/atmega_common/irq_arch.c
+++ b/cpu/atmega_common/irq_arch.c
@@ -21,7 +21,7 @@
 
 #include <stdint.h>
 #include <stdio.h>
-#include "arch/irq_arch.h"
+#include "irq.h"
 #include "cpu.h"
 
 /**
@@ -58,7 +58,7 @@ __attribute__((always_inline)) inline void __set_interrupt_state(uint8_t state)
 /**
  * @brief Disable all maskable interrupts
  */
-unsigned int irq_arch_disable(void)
+unsigned int irq_disable(void)
 {
     uint8_t mask = __get_interrupt_state();
     cli();
@@ -68,7 +68,7 @@ unsigned int irq_arch_disable(void)
 /**
  * @brief Enable all maskable interrupts
  */
-unsigned int irq_arch_enable(void)
+unsigned int irq_enable(void)
 {
     sei();
     return __get_interrupt_state();
@@ -77,7 +77,7 @@ unsigned int irq_arch_enable(void)
 /**
  * @brief Restore the state of the IRQ flags
  */
-void irq_arch_restore(unsigned int state)
+void irq_restore(unsigned int state)
 {
     __set_interrupt_state(state);
 }
@@ -85,7 +85,7 @@ void irq_arch_restore(unsigned int state)
 /**
  * @brief See if the current context is inside an ISR
  */
-int irq_arch_in(void)
+int irq_is_in(void)
 {
     return __in_isr;
 }
diff --git a/cpu/atmega_common/thread_arch.c b/cpu/atmega_common/thread_arch.c
index cb708749dda9d6fd4711d97e13349a5f29812a18..d7932d55b4d3508f9e89c04a5458a5828e22c25d 100644
--- a/cpu/atmega_common/thread_arch.c
+++ b/cpu/atmega_common/thread_arch.c
@@ -20,7 +20,6 @@
 
 #include <stdio.h>
 
-#include "arch/thread_arch.h"
 #include "thread.h"
 #include "sched.h"
 #include "irq.h"
@@ -64,7 +63,7 @@ static void __enter_thread_mode(void);
  * @brief Since AVR doesn't support direct manipulation of the program counter we
  * model a stack like it would be left by __context_save().
  * The resulting layout in memory is the following:
- * ---------------thread_t (not created by thread_arch_stack_init) ----------
+ * ---------------thread_t (not created by thread_stack_init) ----------
  * local variables (a temporary value and the stackpointer)
  * -----------------------------------------------------------------------
  * a marker (AFFE) - for debugging purposes (helps finding the stack
@@ -92,7 +91,7 @@ static void __enter_thread_mode(void);
  * it inside of the programm counter of the MCU.
  * if task_func returns sched_task_exit gets popped into the PC
  */
-char *thread_arch_stack_init(thread_task_func_t task_func, void *arg,
+char *thread_stack_init(thread_task_func_t task_func, void *arg,
                              void *stack_start, int stack_size)
 {
     uint16_t tmp_adress;
@@ -193,14 +192,14 @@ char *thread_arch_stack_init(thread_task_func_t task_func, void *arg,
 }
 
 /**
- * @brief thread_arch_stack_print prints the stack to stdout.
+ * @brief thread_stack_print prints the stack to stdout.
  * It depends on getting the correct values for stack_start, stack_size and sp
  * from sched_active_thread.
  * Maybe it would be good to change that to way that is less dependant on
  * getting correct values elsewhere (since it is a debugging tool and in the
  * presence of bugs the data may be corrupted).
  */
-void thread_arch_stack_print(void)
+void thread_stack_print(void)
 {
     uint8_t  found_marker = 1;
     uint8_t *sp = (uint8_t *)sched_active_thread->sp;
@@ -223,8 +222,8 @@ void thread_arch_stack_print(void)
     printf("stack size: %u bytes\n", size);
 }
 
-void thread_arch_start_threading(void) __attribute__((naked));
-void thread_arch_start_threading(void)
+void cpu_switch_context_exit(void) __attribute__((naked));
+void cpu_switch_context_exit(void)
 {
     sched_run();
     AVR_CONTEXT_SWAP_INIT;
@@ -245,7 +244,7 @@ void NORETURN __enter_thread_mode(void)
     UNREACHABLE();
 }
 
-void thread_arch_yield(void) {
+void thread_yield_higher(void) {
     AVR_CONTEXT_SWAP_TRIGGER;
 }
 
diff --git a/cpu/cortexm_common/irq_arch.c b/cpu/cortexm_common/irq_arch.c
index e99baf1c7264afc13660df85eeb66c67c811d7ab..9d8c14f5ba8a582928f1c80d2e0dcc332be8d686 100644
--- a/cpu/cortexm_common/irq_arch.c
+++ b/cpu/cortexm_common/irq_arch.c
@@ -19,13 +19,13 @@
  */
 
 #include <stdint.h>
-#include "arch/irq_arch.h"
+#include "irq.h"
 #include "cpu.h"
 
 /**
  * @brief Disable all maskable interrupts
  */
-unsigned int irq_arch_disable(void)
+unsigned int irq_disable(void)
 {
     uint32_t mask = __get_PRIMASK();
     __disable_irq();
@@ -35,7 +35,7 @@ unsigned int irq_arch_disable(void)
 /**
  * @brief Enable all maskable interrupts
  */
-__attribute__((used)) unsigned int irq_arch_enable(void)
+__attribute__((used)) unsigned int irq_enable(void)
 {
     __enable_irq();
     return __get_PRIMASK();
@@ -44,7 +44,7 @@ __attribute__((used)) unsigned int irq_arch_enable(void)
 /**
  * @brief Restore the state of the IRQ flags
  */
-void irq_arch_restore(unsigned int state)
+void irq_restore(unsigned int state)
 {
     __set_PRIMASK(state);
 }
@@ -52,7 +52,7 @@ void irq_arch_restore(unsigned int state)
 /**
  * @brief See if the current context is inside an ISR
  */
-int irq_arch_in(void)
+int irq_is_in(void)
 {
     return (__get_IPSR() & 0xFF);
 }
diff --git a/cpu/cortexm_common/thread_arch.c b/cpu/cortexm_common/thread_arch.c
index 610af6a74003435770dcd1e8068dccea68352120..7523e45a4de607105c10669074440ed326982d6f 100644
--- a/cpu/cortexm_common/thread_arch.c
+++ b/cpu/cortexm_common/thread_arch.c
@@ -94,7 +94,6 @@
 
 #include <stdio.h>
 
-#include "arch/thread_arch.h"
 #include "sched.h"
 #include "thread.h"
 #include "irq.h"
@@ -106,7 +105,7 @@ extern uint32_t _sstack;
 /**
  * @brief   Noticeable marker marking the beginning of a stack segment
  *
- * This marker is used e.g. by *thread_arch_start_threading* to identify the
+ * This marker is used e.g. by *cpu_switch_context_exit* to identify the
  * stacks beginning.
  */
 #define STACK_MARKER                (0x77777777)
@@ -124,7 +123,7 @@ extern uint32_t _sstack;
  */
 #define EXCEPT_RET_TASK_MODE        (0xfffffffd)
 
-char *thread_arch_stack_init(thread_task_func_t task_func,
+char *thread_stack_init(thread_task_func_t task_func,
                              void *arg,
                              void *stack_start,
                              int stack_size)
@@ -236,7 +235,7 @@ char *thread_arch_stack_init(thread_task_func_t task_func,
     return (char*) stk;
 }
 
-void thread_arch_stack_print(void)
+void thread_stack_print(void)
 {
     int count = 0;
     uint32_t *sp = (uint32_t *)sched_active_thread->sp;
@@ -255,7 +254,7 @@ void thread_arch_stack_print(void)
 }
 
 /* This function returns the number of bytes used on the ISR stack */
-int thread_arch_isr_stack_usage(void)
+int thread_isr_stack_usage(void)
 {
     uint32_t *ptr = &_sstack;
 
@@ -267,21 +266,21 @@ int thread_arch_isr_stack_usage(void)
     return num_used_words * sizeof(*ptr);
 }
 
-void *thread_arch_isr_stack_pointer(void)
+void *thread_isr_stack_pointer(void)
 {
     void *msp = (void *)__get_MSP();
     return msp;
 }
 
-void *thread_arch_isr_stack_start(void)
+void *thread_isr_stack_start(void)
 {
     return (void *)&_sstack;
 }
 
-__attribute__((naked)) void NORETURN thread_arch_start_threading(void)
+__attribute__((naked)) void NORETURN cpu_switch_context_exit(void)
 {
     __asm__ volatile (
-    "bl     irq_arch_enable               \n" /* enable IRQs to make the SVC
+    "bl     irq_enable               \n" /* enable IRQs to make the SVC
                                            * interrupt is reachable */
     "svc    #1                            \n" /* trigger the SVC interrupt */
     "unreachable%=:                       \n" /* this loop is unreachable */
@@ -289,7 +288,7 @@ __attribute__((naked)) void NORETURN thread_arch_start_threading(void)
     :::);
 }
 
-void thread_arch_yield(void)
+void thread_yield_higher(void)
 {
     /* trigger the PENDSV interrupt to run scheduler and schedule new thread if
      * applicable */
diff --git a/cpu/lm4f120/cpu.c b/cpu/lm4f120/cpu.c
index 2fac9488522fc9e73add9679dfaa729e0c818092..ba65f4c96ed91bd52886b12cc802cb9ad9da9ee4 100644
--- a/cpu/lm4f120/cpu.c
+++ b/cpu/lm4f120/cpu.c
@@ -21,8 +21,7 @@
 #include "irq.h"
 #include "sched.h"
 #include "thread.h"
-#include "arch/thread_arch.h"
-#include "arch/irq_arch.h"
+#include "irq.h"
 #include "periph/init.h"
 #include "periph_conf.h"
 
diff --git a/cpu/mips32r2_common/cpu.c b/cpu/mips32r2_common/cpu.c
index 2c1a204aee1e6835ddc2ec382eb672d0b90668a5..2cef4c9c404a2aee43f7f2e03def9bb62e0eb009 100644
--- a/cpu/mips32r2_common/cpu.c
+++ b/cpu/mips32r2_common/cpu.c
@@ -15,7 +15,7 @@
 
 #include "periph/uart.h"
 #include "periph/timer.h"
-#include "arch/panic_arch.h"
+#include "panic.h"
 #include "kernel_init.h"
 #include "cpu.h"
 #include "board.h"
diff --git a/cpu/mips32r2_common/irq_arch.c b/cpu/mips32r2_common/irq_arch.c
index e9b0c70c659ba607043875f3602c313355f5615a..f7c67e294c517d1b790eaf6fb95d8c041ef312e5 100644
--- a/cpu/mips32r2_common/irq_arch.c
+++ b/cpu/mips32r2_common/irq_arch.c
@@ -7,10 +7,10 @@
  */
 
 #include <mips/m32c0.h>
-#include "arch/irq_arch.h"
+#include "irq.h"
 
 
-unsigned int irq_arch_enable(void)
+unsigned int irq_enable(void)
 {
     unsigned int status;
 
@@ -18,7 +18,7 @@ unsigned int irq_arch_enable(void)
     return status;
 }
 
-unsigned int irq_arch_disable(void)
+unsigned int irq_disable(void)
 {
     unsigned int status;
 
@@ -26,7 +26,7 @@ unsigned int irq_arch_disable(void)
     return status;
 }
 
-void irq_arch_restore(unsigned int state)
+void irq_restore(unsigned int state)
 {
     if (state & SR_IE) {
         mips32_bs_c0(C0_STATUS, SR_IE);
@@ -36,7 +36,7 @@ void irq_arch_restore(unsigned int state)
     }
 }
 
-int irq_arch_in(void)
+int irq_is_in(void)
 {
     return (mips32_get_c0(C0_STATUS) & SR_EXL) != 0;
 }
diff --git a/cpu/mips32r2_common/periph/timer.c b/cpu/mips32r2_common/periph/timer.c
index 0cc2d3e392348a1022a74d03f842eefb50c78a45..009ed0d4d0444aedff34d19d7c1df19fcdd58969 100644
--- a/cpu/mips32r2_common/periph/timer.c
+++ b/cpu/mips32r2_common/periph/timer.c
@@ -126,9 +126,9 @@ int timer_set(tim_t dev, int channel, unsigned int timeout)
     timeout >>= TIMER_ACCURACY_SHIFT;
     timeout <<= TIMER_ACCURACY_SHIFT;
 
-    uint32_t status = irq_arch_disable();
+    uint32_t status = irq_disable();
     compares[channel] = counter + timeout;
-    irq_arch_restore(status);
+    irq_restore(status);
 
     return channel;
 }
@@ -141,9 +141,9 @@ int timer_set_absolute(tim_t dev, int channel, unsigned int value)
     value >>= TIMER_ACCURACY_SHIFT;
     value <<= TIMER_ACCURACY_SHIFT;
 
-    uint32_t status = irq_arch_disable();
+    uint32_t status = irq_disable();
     compares[channel] = value;
-    irq_arch_restore(status);
+    irq_restore(status);
 
     return channel;
 }
@@ -153,9 +153,9 @@ int timer_clear(tim_t dev, int channel)
     assert(dev == 0);
     assert(channel < CHANNELS);
 
-    uint32_t status = irq_arch_disable();
+    uint32_t status = irq_disable();
     compares[channel] = 0;
-    irq_arch_restore(status);
+    irq_restore(status);
 
     return channel;
 }
@@ -225,9 +225,9 @@ void __attribute__ ((interrupt("vector=hw5"))) _mips_isr_hw5(void)
 #ifdef EIC_IRQ
         eic_irq_ack(EIC_IRQ_TIMER);
 #endif
-        uint32_t status = irq_arch_disable();
+        uint32_t status = irq_disable();
         counter += TIMER_ACCURACY;
-        irq_arch_restore(status);
+        irq_restore(status);
 
         if (counter == compares[0]) {
             /*
diff --git a/cpu/mips32r2_common/thread_arch.c b/cpu/mips32r2_common/thread_arch.c
index 537e9edaa812c7cabdede35de253a05bcadbaf44..4fae163d803fad6bc195d556174a91228a3c701c 100644
--- a/cpu/mips32r2_common/thread_arch.c
+++ b/cpu/mips32r2_common/thread_arch.c
@@ -60,7 +60,7 @@ static struct fp64ctx *oldfpctx;       /* fpu context of last task that executed
  *     ---------------   <--- sched_active_thread->sp
  */
 
-char *thread_arch_stack_init(thread_task_func_t task_func, void *arg,
+char *thread_stack_init(thread_task_func_t task_func, void *arg,
                              void *stack_start, int stack_size)
 {
     /* make sure it is aligned to 8 bytes this is a requirement of the O32 ABI */
@@ -106,7 +106,7 @@ char *thread_arch_stack_init(thread_task_func_t task_func, void *arg,
     return (void *)p;
 }
 
-void thread_arch_stack_print(void)
+void thread_stack_print(void)
 {
     uintptr_t *sp = (void *)sched_active_thread->sp;
 
@@ -118,7 +118,7 @@ void thread_arch_stack_print(void)
 }
 
 extern void __exception_restore(void);
-void thread_arch_start_threading(void)
+void cpu_switch_context_exit(void)
 {
     unsigned int status = mips32_get_c0(C0_STATUS);
 
@@ -140,7 +140,7 @@ void thread_arch_start_threading(void)
     UNREACHABLE();
 }
 
-void thread_arch_yield(void)
+void thread_yield_higher(void)
 {
     /*
      * throw a syscall exception to get into exception level
@@ -217,11 +217,11 @@ _mips_handle_exception(struct gpctx *ctx, int exception)
             if (syscall_num == __MIPS_UHI_SYSCALL_NUM) {
                 if (ctx->t2[1] == __MIPS_UHI_WRITE &&
                     (ctx->a[0] == STDOUT_FILENO || ctx->a[0] == STDERR_FILENO)) {
-                    uint32_t status = irq_arch_disable();
+                    uint32_t status = irq_disable();
                     uart_write(DEBUG_VIA_UART, (uint8_t *)ctx->a[1], ctx->a[2]);
                     ctx->v[0] = ctx->a[2];
                     ctx->epc += 4; /* move PC past the syscall */
-                    irq_arch_restore(status);
+                    irq_restore(status);
                     return;
                 }
                 else if (ctx->t2[1] == __MIPS_UHI_FSTAT &&
diff --git a/cpu/msp430_common/cpu.c b/cpu/msp430_common/cpu.c
index 3bc28efbee126581f42792a0d0091122a6d923d0..45b20ff4c1be46ec44b0c1d58f33055215546d19 100644
--- a/cpu/msp430_common/cpu.c
+++ b/cpu/msp430_common/cpu.c
@@ -34,19 +34,19 @@ __attribute__((naked)) void thread_yield_higher(void)
 }
 
 /* This function calculates the ISR_usage */
-int thread_arch_isr_stack_usage(void)
+int thread_isr_stack_usage(void)
 {
     /* TODO */
     return -1;
 }
 
-void *thread_arch_isr_stack_pointer(void)
+void *thread_isr_stack_pointer(void)
 {
     /* TODO */
     return (void *)-1;
 }
 
-void *thread_arch_isr_stack_start(void)
+void *thread_isr_stack_start(void)
 {
     /* TODO */
     return (void *)-1;
diff --git a/cpu/native/irq_cpu.c b/cpu/native/irq_cpu.c
index 645c3bf6978036411e0d756538cb61e7510fe0d9..6f1093e1b170e6abe80f7d144f60ad0ebbe2475c 100644
--- a/cpu/native/irq_cpu.c
+++ b/cpu/native/irq_cpu.c
@@ -61,12 +61,12 @@ int _sig_pipefd[2];
 static _native_callback_t native_irq_handlers[255];
 char sigalt_stk[SIGSTKSZ];
 
-void *thread_arch_isr_stack_pointer(void)
+void *thread_isr_stack_pointer(void)
 {
     return native_isr_context.uc_stack.ss_sp;
 }
 
-void *thread_arch_isr_stack_start(void)
+void *thread_isr_stack_start(void)
 {
     return __isr_stack;
 }
diff --git a/cpu/native/native_cpu.c b/cpu/native/native_cpu.c
index 9d07a72dc6fc555fe42542d17a431f1c297e6346..cb9ffbceea335973be83235b5fa0e4ebca0cba6e 100644
--- a/cpu/native/native_cpu.c
+++ b/cpu/native/native_cpu.c
@@ -97,7 +97,7 @@ void thread_print_stack(void)
 }
 
 /* This function calculates the ISR_usage */
-int thread_arch_isr_stack_usage(void)
+int thread_isr_stack_usage(void)
 {
     /* TODO */
     return -1;
diff --git a/cpu/nrf52/vectors.c b/cpu/nrf52/vectors.c
index fcc0d540393d1417902ec94fb2de937865e2bdf5..a5f6287d82de2ce3be5f081ec4d2a96dbefecc66 100644
--- a/cpu/nrf52/vectors.c
+++ b/cpu/nrf52/vectors.c
@@ -59,10 +59,10 @@ WEAK_DEFAULT void isr_swi0(void);
  * the softdevice ISRs leads to a crash. This workaround
  * uses swi0 as trampoline.
  */
-extern void thread_arch_yield(void);
+extern void thread_yield_higher(void);
 void isr_swi0(void)
 {
-    thread_arch_yield();
+    thread_yield_higher();
 }
 #endif
 
diff --git a/makefiles/arch/cortexm.inc.mk b/makefiles/arch/cortexm.inc.mk
index 69d4844a7e7014d1af9f15ba3b06c429ad5d10ff..ad8dddfa96abaa3650ae53643d48b80e39962bf3 100644
--- a/makefiles/arch/cortexm.inc.mk
+++ b/makefiles/arch/cortexm.inc.mk
@@ -22,9 +22,6 @@ export LINKFLAGS += -T$(LINKER_SCRIPT) -Wl,--fatal-warnings
 export LINKFLAGS += $(CFLAGS_CPU) $(CFLAGS_DBG) $(CFLAGS_OPT) -static -lgcc -nostartfiles
 export LINKFLAGS += -Wl,--gc-sections
 
-# This CPU implementation is using the new core/CPU interface:
-export CFLAGS += -DCOREIF_NG=1
-
 # Tell the build system that the CPU depends on the Cortex-M common files:
 export USEMODULE += cortexm_common
 # Export the peripheral drivers to be linked into the final binary:
diff --git a/makefiles/arch/mips.inc.mk b/makefiles/arch/mips.inc.mk
index 7d431101c01981251729a019f2fc88f073cd478e..60486b3cee423c546f1b8646d0447b54990087bf 100644
--- a/makefiles/arch/mips.inc.mk
+++ b/makefiles/arch/mips.inc.mk
@@ -64,6 +64,3 @@ export LINKFLAGS += $(MIPS_HAL_LDFLAGS)
 export LINKFLAGS += -L$(RIOTCPU)/$(CPU)/ldscripts
 export LINKFLAGS += $(CFLAGS_CPU) $(CFLAGS_DBG) $(CFLAGS_OPT)
 export LINKFLAGS += -Wl,--gc-sections
-
-# This CPU implementation is using the new core/CPU interface:
-export CFLAGS += -DCOREIF_NG=1
diff --git a/sys/ps/ps.c b/sys/ps/ps.c
index 11d52c895f438b0e73fb9e3180eac61a70abb2f7..5866863119364cd0c8aed1a3f04e2c48b35d83c3 100644
--- a/sys/ps/ps.c
+++ b/sys/ps/ps.c
@@ -73,9 +73,9 @@ void ps(void)
            "state");
 
 #if defined(DEVELHELP) && defined(ISR_STACKSIZE)
-    int isr_usage = thread_arch_isr_stack_usage();
-    void *isr_start = thread_arch_isr_stack_start();
-    void *isr_sp = thread_arch_isr_stack_pointer();
+    int isr_usage = thread_isr_stack_usage();
+    void *isr_start = thread_isr_stack_start();
+    void *isr_sp = thread_isr_stack_pointer();
     printf("\t  - | isr_stack            | -        - |"
            "   - | %6i (%5i) | %10p | %10p\n", ISR_STACKSIZE, isr_usage, isr_start, isr_sp);
     overall_stacksz += ISR_STACKSIZE;