diff --git a/cpu/cortexm_common/include/cpu.h b/cpu/cortexm_common/include/cpu.h index a7c2f1e59fccbf729aa4ae961cc7f4345635b563..57110b1621443d1af75e5c880bad883b3b7ece4b 100644 --- a/cpu/cortexm_common/include/cpu.h +++ b/cpu/cortexm_common/include/cpu.h @@ -64,6 +64,15 @@ extern "C" { #endif /** @} */ +/** + * @brief Stack size used for the exception (ISR) stack + * @{ + */ +#ifndef ISR_STACKSIZE +#define ISR_STACKSIZE (512U) +#endif +/** @} */ + /** * @brief Some members of the Cortex-M family have architecture specific * atomic operations in atomic_arch.c diff --git a/cpu/cortexm_common/ldscripts/cortexm_base.ld b/cpu/cortexm_common/ldscripts/cortexm_base.ld index a53c4df7eb2f6372bda5714f48b8d2aba6ee8fa2..6865e913bce0d3fed495e20ca0b870a3dd42d690 100644 --- a/cpu/cortexm_common/ldscripts/cortexm_base.ld +++ b/cpu/cortexm_common/ldscripts/cortexm_base.ld @@ -31,11 +31,6 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) SEARCH_DIR(.) -/* Define the default stack size for interrupt mode. As no context is - saved on this stack and ISRs are supposed to be short, it can be fairly - small. 512 byte should be a save assumption here */ -STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 0x200; /* 512 byte */ - /* Section Definitions */ SECTIONS { @@ -134,7 +129,7 @@ SECTIONS { . = ALIGN(8); _sstack = .; - . = . + STACK_SIZE; + KEEP (*(.isr_stack)) . = ALIGN(8); _estack = .; } > ram diff --git a/cpu/cortexm_common/vectors_cortexm.c b/cpu/cortexm_common/vectors_cortexm.c index 3ae9c83b579ab6f2203f04f2566e7d0ac2450d8c..feb89472d276a40a49a4981d6d0a9ac49b7623da 100644 --- a/cpu/cortexm_common/vectors_cortexm.c +++ b/cpu/cortexm_common/vectors_cortexm.c @@ -55,6 +55,11 @@ extern uint32_t _eram; */ #define STACK_CANARY_WORD 0xE7FEE7FEu +/** + * @brief Allocation of the interrupt stack + */ +__attribute__((used,section(".isr_stack"))) uint8_t isr_stack[ISR_STACKSIZE]; + /** * @brief Pre-start routine for CPU-specific settings */