diff --git a/cpu/sam21_common/include/cmsis/samr21/README.md b/cpu/sam21_common/include/cmsis/samr21/README.md
index 9c9ff143b8f088489e623a71fc6075357a9bb1f1..fd622f3b55773ecb4411db29f96430a093497e1f 100644
--- a/cpu/sam21_common/include/cmsis/samr21/README.md
+++ b/cpu/sam21_common/include/cmsis/samr21/README.md
@@ -13,3 +13,15 @@ the trailing white space had to be removed.  Please take this into account
 when comparing to the original ASF distribution.
 
     find include/ -name '*.h' -exec sed -i 's/\s*$//' '{}' +
+
+## LITTLE_ENDIAN
+
+These include files define `LITTLE_ENDIAN`.  But we think this is wrong.  It
+seems more logical to let the compiler decide in which mode the ARM code is
+to be translated.  In include/machine/endian.h there is already a define of
+`LITTLE_ENDIAN` (and `BIG_ENDIAN`) for a different purpose.
+
+So, we decided to remove the define from the ASF CMSIS files.  The command
+for it (running from this directory) is:
+
+    find include/ -name '*.h' -exec sed -i '/^#define\s\s*LITTLE_ENDIAN/d' '{}' +
diff --git a/cpu/sam21_common/include/cmsis/samr21/include/samr21e16a.h b/cpu/sam21_common/include/cmsis/samr21/include/samr21e16a.h
index 931bafca9cf4544b28c2ea4c88333c04338c84dc..88be0a31efabaa3c7e1f141c4bbde0ccafa38586 100644
--- a/cpu/sam21_common/include/cmsis/samr21/include/samr21e16a.h
+++ b/cpu/sam21_common/include/cmsis/samr21/include/samr21e16a.h
@@ -229,7 +229,6 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
diff --git a/cpu/sam21_common/include/cmsis/samr21/include/samr21e17a.h b/cpu/sam21_common/include/cmsis/samr21/include/samr21e17a.h
index 38d7a98c75be39a1628c84cb630c3f186ea1e251..8e42ec2da3702c953d4e4b249b59535b8173e38d 100644
--- a/cpu/sam21_common/include/cmsis/samr21/include/samr21e17a.h
+++ b/cpu/sam21_common/include/cmsis/samr21/include/samr21e17a.h
@@ -229,7 +229,6 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
diff --git a/cpu/sam21_common/include/cmsis/samr21/include/samr21e18a.h b/cpu/sam21_common/include/cmsis/samr21/include/samr21e18a.h
index 6bae1e0e0a5709e8ee53b97694a07a827308921d..ebaf8fb988b34476e7dc3065d70a54e9a717f728 100644
--- a/cpu/sam21_common/include/cmsis/samr21/include/samr21e18a.h
+++ b/cpu/sam21_common/include/cmsis/samr21/include/samr21e18a.h
@@ -229,7 +229,6 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
diff --git a/cpu/sam21_common/include/cmsis/samr21/include/samr21g16a.h b/cpu/sam21_common/include/cmsis/samr21/include/samr21g16a.h
index 5a51cc15abc399132805d2cb18ccb63be139063c..5e60e728ca1eb3c93a2becae77ee7606fccc3340 100644
--- a/cpu/sam21_common/include/cmsis/samr21/include/samr21g16a.h
+++ b/cpu/sam21_common/include/cmsis/samr21/include/samr21g16a.h
@@ -229,7 +229,6 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
diff --git a/cpu/sam21_common/include/cmsis/samr21/include/samr21g17a.h b/cpu/sam21_common/include/cmsis/samr21/include/samr21g17a.h
index 1f7ed0341c21580e8d6b4d5a373863fa2a245262..fde6b89fe631397a73b0dad5093119f453073277 100644
--- a/cpu/sam21_common/include/cmsis/samr21/include/samr21g17a.h
+++ b/cpu/sam21_common/include/cmsis/samr21/include/samr21g17a.h
@@ -229,7 +229,6 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
diff --git a/cpu/sam21_common/include/cmsis/samr21/include/samr21g18a.h b/cpu/sam21_common/include/cmsis/samr21/include/samr21g18a.h
index 00ac5f292ed59e3102600f18ecb40600632627d5..28cd2a3eaadfdccb5178717525579e5a47533ec6 100644
--- a/cpu/sam21_common/include/cmsis/samr21/include/samr21g18a.h
+++ b/cpu/sam21_common/include/cmsis/samr21/include/samr21g18a.h
@@ -229,7 +229,6 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */