From df996044e2286ec0f5d24ada065520f98d03c2c5 Mon Sep 17 00:00:00 2001
From: DipSwitch <dipswitch@ownage4u.nl>
Date: Sun, 14 Feb 2016 15:17:22 +0100
Subject: [PATCH] STM32 GPIO: Fix exti_isr handling to only call callbacks of
lines with have there interrupt enabled
---
cpu/stm32f0/periph/gpio.c | 4 +++-
cpu/stm32f1/periph/gpio.c | 4 +++-
cpu/stm32f3/periph/gpio.c | 4 +++-
cpu/stm32f4/periph/gpio.c | 4 +++-
cpu/stm32l1/periph/gpio.c | 4 +++-
5 files changed, 15 insertions(+), 5 deletions(-)
diff --git a/cpu/stm32f0/periph/gpio.c b/cpu/stm32f0/periph/gpio.c
index d3b9e7b9bc..72b7487e06 100644
--- a/cpu/stm32f0/periph/gpio.c
+++ b/cpu/stm32f0/periph/gpio.c
@@ -199,8 +199,10 @@ void gpio_write(gpio_t pin, int value)
void isr_exti(void)
{
+ /* only generate interrupts against lines which have their IMR set */
+ uint32_t pending_isr = (EXTI->PR & EXTI->IMR);
for (size_t i = 0; i < EXTI_NUMOF; i++) {
- if (EXTI->PR & (1 << i)) {
+ if (pending_isr & (1 << i)) {
EXTI->PR = (1 << i); /* clear by writing a 1 */
isr_ctx[i].cb(isr_ctx[i].arg);
}
diff --git a/cpu/stm32f1/periph/gpio.c b/cpu/stm32f1/periph/gpio.c
index e49d477d44..4d18dff35a 100644
--- a/cpu/stm32f1/periph/gpio.c
+++ b/cpu/stm32f1/periph/gpio.c
@@ -207,8 +207,10 @@ void gpio_write(gpio_t pin, int value)
void isr_exti(void)
{
+ /* only generate interrupts against lines which have their IMR set */
+ uint32_t pending_isr = (EXTI->PR & EXTI->IMR);
for (unsigned i = 0; i < GPIO_ISR_CHAN_NUMOF; i++) {
- if (EXTI->PR & (1 << i)) {
+ if (pending_isr & (1 << i)) {
EXTI->PR = (1 << i); /* clear by writing a 1 */
exti_ctx[i].cb(exti_ctx[i].arg);
}
diff --git a/cpu/stm32f3/periph/gpio.c b/cpu/stm32f3/periph/gpio.c
index 6d267f4444..553f295e40 100644
--- a/cpu/stm32f3/periph/gpio.c
+++ b/cpu/stm32f3/periph/gpio.c
@@ -203,8 +203,10 @@ void gpio_write(gpio_t pin, int value)
void isr_exti(void)
{
+ /* only generate interrupts against lines which have their IMR set */
+ uint32_t pending_isr = (EXTI->PR & EXTI->IMR);
for (int i = 0; i < EXTI_NUMOF; i++) {
- if (EXTI->PR & (1 << i)) {
+ if (pending_isr & (1 << i)) {
EXTI->PR |= (1 << i); /* clear by writing a 1 */
exti_chan[i].cb(exti_chan[i].arg);
}
diff --git a/cpu/stm32f4/periph/gpio.c b/cpu/stm32f4/periph/gpio.c
index 8ad84ad6c3..47a0083322 100644
--- a/cpu/stm32f4/periph/gpio.c
+++ b/cpu/stm32f4/periph/gpio.c
@@ -200,8 +200,10 @@ void gpio_write(gpio_t pin, int value)
void isr_exti(void)
{
+ /* only generate interrupts against lines which have their IMR set */
+ uint32_t pending_isr = (EXTI->PR & EXTI->IMR);
for (unsigned i = 0; i < GPIO_ISR_CHAN_NUMOF; i++) {
- if (EXTI->PR & (1 << i)) {
+ if (pending_isr & (1 << i)) {
EXTI->PR |= (1 << i); /* clear by writing a 1 */
exti_chan[i].cb(exti_chan[i].arg);
}
diff --git a/cpu/stm32l1/periph/gpio.c b/cpu/stm32l1/periph/gpio.c
index 8257d172d5..613e1d1ce3 100644
--- a/cpu/stm32l1/periph/gpio.c
+++ b/cpu/stm32l1/periph/gpio.c
@@ -204,8 +204,10 @@ void gpio_write(gpio_t pin, int value)
void isr_exti(void)
{
+ /* only generate interrupts against lines which have their IMR set */
+ uint32_t pending_isr = (EXTI->PR & EXTI->IMR);
for (int i = 0; i < GPIO_ISR_CHAN_NUMOF; i++) {
- if (EXTI->PR & (1 << i)) {
+ if (pending_isr & (1 << i)) {
EXTI->PR |= (1 << i); /* clear by writing a 1 */
exti_chan[i].cb(exti_chan[i].arg);
}
--
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