diff --git a/boards/spark-core/Makefile.include b/boards/spark-core/Makefile.include
index 7ab641a02356dc3684c579d49029ebc0ec71c1e1..7ff46a018372d0cd0d4ed4b2bc136e5a3b916f66 100644
--- a/boards/spark-core/Makefile.include
+++ b/boards/spark-core/Makefile.include
@@ -2,6 +2,9 @@
 export CPU = stm32f1
 export CPU_MODEL = stm32f103cb
 
+# the spark-core uses its own custom linkerscript...
+export LINKER_SCRIPT = stm32f103cb_sparkcore.ld
+
 # set the default port
 export PORT ?= /dev/ttyUSB0
 
diff --git a/cpu/stm32f1/ldscripts/stm32f103cb_sparkcore.ld b/cpu/stm32f1/ldscripts/stm32f103cb_sparkcore.ld
new file mode 100644
index 0000000000000000000000000000000000000000..c5d3ca83615813ffa4a835b0585165cad5457def
--- /dev/null
+++ b/cpu/stm32f1/ldscripts/stm32f103cb_sparkcore.ld
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2015 Freie Universität Berlin
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @addtogroup      cpu_stm32f1
+ * @{
+ *
+ * @file
+ * @brief           Spark-core specific memory definitions for the STM32F103CB
+ *
+ * @author          Hauke Petersen <hauke.petersen@fu-berlin.de>
+ *
+ * @}
+ */
+
+MEMORY
+{
+    rom (rx)    : ORIGIN = 0x08005000, LENGTH = 128K-0x5000
+    ram (xrw)   : ORIGIN = 0x20000000, LENGTH = 20K
+    cpuid (r)   : ORIGIN = 0x1ffff7e8, LENGTH = 12
+}
+
+_cpuid_address = ORIGIN(cpuid);
+
+INCLUDE cortexm_base.ld