From f48ea33805b5762362cc85cd6a2d602a94b47c7a Mon Sep 17 00:00:00 2001
From: Hauke Petersen <hauke.petersen@fu-berlin.de>
Date: Wed, 27 May 2015 23:08:41 +0200
Subject: [PATCH] cpu/stm32l1: adapted to centralized cpu conf
---
cpu/stm32l1/cpu.c | 8 ++------
cpu/stm32l1/include/cpu_conf.h | 35 ++++-----------------------------
cpu/stm32l1/include/stm32l1xx.h | 2 +-
cpu/stm32l1/startup.c | 9 ++++-----
4 files changed, 11 insertions(+), 43 deletions(-)
diff --git a/cpu/stm32l1/cpu.c b/cpu/stm32l1/cpu.c
index 642542b514..740614d5aa 100644
--- a/cpu/stm32l1/cpu.c
+++ b/cpu/stm32l1/cpu.c
@@ -26,14 +26,10 @@ static void clk_init(void);
void cpu_init(void)
{
- /* set PendSV priority to the lowest possible priority */
- NVIC_SetPriority(PendSV_IRQn, 0xff);
-
+ /* initialize the Cortex-M core */
+ cortexm_init();
/* initialize system clocks */
clk_init();
-
- /* configure the vector table location to internal flash */
- SCB->VTOR = FLASH_BASE;
}
/**
diff --git a/cpu/stm32l1/include/cpu_conf.h b/cpu/stm32l1/include/cpu_conf.h
index b6badbc600..fc427df41b 100644
--- a/cpu/stm32l1/include/cpu_conf.h
+++ b/cpu/stm32l1/include/cpu_conf.h
@@ -28,28 +28,12 @@ extern "C" {
#endif
/**
- * @name Kernel configuration
- *
- * @{
- */
-#define THREAD_EXTRA_STACKSIZE_PRINTF (1024)
-
-#ifndef THREAD_STACKSIZE_DEFAULT
-#define THREAD_STACKSIZE_DEFAULT (1024)
-#endif
-
-#define THREAD_STACKSIZE_IDLE (256)
-/** @} */
-
-/**
- * @name UART0 buffer size definition for compatibility reasons
- *
- * TODO: remove once the remodeling of the uart0 driver is done
+ * @brief ARM Cortex-M specific CPU configuration
* @{
*/
-#ifndef UART0_BUFSIZE
-#define UART0_BUFSIZE (128)
-#endif
+#define CPU_DEFAULT_IRQ_PRIO (1U)
+#define CPU_IRQ_NUMOF (57U)
+#define CPU_FLASH_BASE FLASH_BASE
/** @} */
/**
@@ -57,17 +41,6 @@ extern "C" {
*/
#define CPUID_ID_LEN (12)
-/**
- * @name Definition of different panic modes
- */
-typedef enum {
- HARD_FAULT,
- WATCHDOG,
- BUS_FAULT,
- USAGE_FAULT,
- DUMMY_HANDLER
-} panic_t;
-
#define TRANSCEIVER_BUFFER_SIZE (3)
#ifdef __cplusplus
diff --git a/cpu/stm32l1/include/stm32l1xx.h b/cpu/stm32l1/include/stm32l1xx.h
index 1ffc15f346..91a5bafa8d 100644
--- a/cpu/stm32l1/include/stm32l1xx.h
+++ b/cpu/stm32l1/include/stm32l1xx.h
@@ -179,7 +179,7 @@ typedef enum IRQn
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
- SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
+ SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
diff --git a/cpu/stm32l1/startup.c b/cpu/stm32l1/startup.c
index ae56702684..7e3712f6e8 100644
--- a/cpu/stm32l1/startup.c
+++ b/cpu/stm32l1/startup.c
@@ -82,8 +82,7 @@ void reset_handler(void)
*/
void dummy_handler(void)
{
- core_panic(DUMMY_HANDLER, "DUMMY HANDLER");
- while (1) {asm ("nop");}
+ core_panic(PANIC_DUMMY_HANDLER, "DUMMY HANDLER");
}
void isr_nmi(void)
@@ -103,19 +102,19 @@ void isr_debug_mon(void)
void isr_hard_fault(void)
{
- core_panic(HARD_FAULT, "HARD FAULT");
+ core_panic(PANIC_HARD_FAULT, "HARD FAULT");
while (1) {asm ("nop");}
}
void isr_bus_fault(void)
{
- core_panic(BUS_FAULT, "BUS FAULT");
+ core_panic(PANIC_BUS_FAULT, "BUS FAULT");
while (1) {asm ("nop");}
}
void isr_usage_fault(void)
{
- core_panic(USAGE_FAULT, "USAGE FAULT");
+ core_panic(PANIC_USAGE_FAULT, "USAGE FAULT");
while (1) {asm ("nop");}
}
--
GitLab