diff --git a/boards/cc2538dk/board.c b/boards/cc2538dk/board.c
index 13eed787d29db8b7bde4783f60857aea576d775b..0c054f2898b72c5e8097e8360181064d0bbccf93 100644
--- a/boards/cc2538dk/board.c
+++ b/boards/cc2538dk/board.c
@@ -21,10 +21,6 @@
#include "board.h"
#include "cpu.h"
-#include "ioc.h"
-#include "lpm.h"
-#include "cc2538-gpio.h"
-
static void led_init_helper(int gpio_num) {
gpio_software_control(gpio_num);
gpio_dir_output(gpio_num);
diff --git a/boards/cc2538dk/include/periph_conf.h b/boards/cc2538dk/include/periph_conf.h
index b3ff27f7cf47adbe6f3dc10944ceed7ef6639366..6443d6393b9012301753f19f19cd4164c8b66ab6 100644
--- a/boards/cc2538dk/include/periph_conf.h
+++ b/boards/cc2538dk/include/periph_conf.h
@@ -19,7 +19,7 @@
#ifndef PERIPH_CONF_H_
#define PERIPH_CONF_H_
-#include "gptimer.h"
+#include "cpu.h"
#ifdef __cplusplus
extern "C" {
diff --git a/cpu/cc2538/doc.txt b/cpu/cc2538/doc.txt
index 06e55df03d26b1a953ca52de56d997e049082709..8ae0c368b17ed5510bbec48457bf951dcad8edc8 100644
--- a/cpu/cc2538/doc.txt
+++ b/cpu/cc2538/doc.txt
@@ -1,10 +1,11 @@
/**
- * @defgroup cpu_cc2538 Texas Instruments CC2538
+ * @defgroup cpu_cc2538 TI CC2538
* @ingroup cpu
* @brief Texas Instruments CC2538 Cortex-M3 MCU specific code
*/
/**
- * @defgroup cpu_cc2538_definitions Texas Instruments CC2538 Definitions
+ * @defgroup cpu_cc2538_regs TI CC2538 CMSIS-style Headers
* @ingroup cpu_cc2538
+ * @brief CMSIS-style register definitions for the TI CC2538
*/
diff --git a/cpu/cc2538/include/cc2538.h b/cpu/cc2538/include/cc2538.h
index f992f8634435cda9cd72b67a3478cfc0a05f2231..b74c20bd4a59495c0ab5716ac7b0d8951caf4b02 100644
--- a/cpu/cc2538/include/cc2538.h
+++ b/cpu/cc2538/include/cc2538.h
@@ -7,7 +7,7 @@
*/
/**
- * @ingroup cpu_cc2538_definitions
+ * @ingroup cpu_cc2538_regs
* @{
*
* @file
diff --git a/cpu/cc2538/include/cc2538-gpio.h b/cpu/cc2538/include/cc2538_gpio.h
similarity index 94%
rename from cpu/cc2538/include/cc2538-gpio.h
rename to cpu/cc2538/include/cc2538_gpio.h
index a286534b42b652cde7805f5910bc344ca540d156..adf27bb71ef84b2e66d595c86f9aa4128d60074c 100644
--- a/cpu/cc2538/include/cc2538-gpio.h
+++ b/cpu/cc2538/include/cc2538_gpio.h
@@ -7,7 +7,8 @@
*/
/**
- * @addtogroup cpu_cc2538
+ * @defgroup cpu_cc2538_gpio CC2538 General-Purpose I/O
+ * @ingroup cpu_cc2538_regs
* @{
*
* @file
@@ -17,7 +18,6 @@
*
* @author Ian Martin <ian@locicontrols.com>
*
- * @defgroup cc2538-gpio CC2538 General-Purpose I/O
* @{
*/
@@ -216,14 +216,14 @@ typedef struct {
* @brief IOC port component registers
*/
typedef struct {
- cc2538_reg_t PA_SEL[8];
- cc2538_reg_t PB_SEL[8];
- cc2538_reg_t PC_SEL[8];
- cc2538_reg_t PD_SEL[8];
- cc2538_reg_t PA_OVER[8];
- cc2538_reg_t PB_OVER[8];
- cc2538_reg_t PC_OVER[8];
- cc2538_reg_t PD_OVER[8];
+ cc2538_reg_t PA_SEL[8]; /**< Port A SEL register */
+ cc2538_reg_t PB_SEL[8]; /**< Port B SEL register */
+ cc2538_reg_t PC_SEL[8]; /**< Port C SEL register */
+ cc2538_reg_t PD_SEL[8]; /**< Port D SEL register */
+ cc2538_reg_t PA_OVER[8]; /**< Port A OVER register */
+ cc2538_reg_t PB_OVER[8]; /**< Port B OVER register */
+ cc2538_reg_t PC_OVER[8]; /**< Port C OVER register */
+ cc2538_reg_t PD_OVER[8]; /**< Port D OVER register */
} cc2538_ioc_t;
/**
diff --git a/cpu/cc2538/include/cc2538_gptimer.h b/cpu/cc2538/include/cc2538_gptimer.h
new file mode 100644
index 0000000000000000000000000000000000000000..0aa4316ee65f112a19d275451a197c645488c24d
--- /dev/null
+++ b/cpu/cc2538/include/cc2538_gptimer.h
@@ -0,0 +1,164 @@
+/*
+ * Copyright (C) 2014 Loci Controls Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @defgroup cpu_cc2538_gptimer CC2538 General Purpose Timer
+ * @ingroup cpu_cc2538_regs
+ * @{
+ *
+ * @file
+ * @brief CC2538 General Purpose Timer (GPTIMER) driver
+ *
+ * @author Ian Martin <ian@locicontrols.com>
+ */
+
+#ifndef GPTIMER_H
+#define GPTIMER_H
+
+#include <stdint.h>
+
+#include "cc2538.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define GPTIMER_NUMOF 4 /**< The CC2538 has four general-purpose timer units. */
+#define NUM_CHANNELS_PER_GPTIMER 2 /**< Each G.P. timer unit has two channels: A and B. */
+
+enum {
+ GPTIMER_ONE_SHOT_MODE = 1, /**< GPTIMER one-shot mode */
+ GPTIMER_PERIODIC_MODE = 2, /**< GPTIMER periodic mode */
+ GPTIMER_CAPTURE_MODE = 3, /**< GPTIMER capture mode */
+};
+
+enum {
+ GPTMCFG_32_BIT_TIMER = 0, /**< 32-bit timer configuration */
+ GPTMCFG_32_BIT_REAL_TIME_CLOCK = 1, /**< 32-bit real-time clock */
+ GPTMCFG_16_BIT_TIMER = 4, /**< 16-bit timer configuration */
+};
+
+/**
+ * @brief GPTIMER component registers
+ */
+typedef struct {
+ cc2538_reg_t CFG; /**< GPTIMER Configuration */
+
+ /**
+ * @brief Timer A
+ */
+ union {
+ cc2538_reg_t TAMR; /**< GPTIMER Timer A mode */
+ struct {
+ cc2538_reg_t TAMR2 : 2; /**< GPTM Timer A mode */
+ cc2538_reg_t TACRM : 1; /**< GPTM Timer A capture mode */
+ cc2538_reg_t TAAMS : 1; /**< GPTM Timer A alternate mode */
+ cc2538_reg_t TACDIR : 1; /**< GPTM Timer A count direction */
+ cc2538_reg_t TAMIE : 1; /**< GPTM Timer A match interrupt enable */
+ cc2538_reg_t TAWOT : 1; /**< GPTM Timer A wait-on-trigger */
+ cc2538_reg_t TASNAPS : 1; /**< GPTM Timer A snap shot mode */
+ cc2538_reg_t TAILD : 1; /**< GPTM Timer A interval load write */
+ cc2538_reg_t TAPWMIE : 1; /**< GPTM Timer A PWM interrupt enable */
+ cc2538_reg_t TAMRSU : 1; /**< Timer A match register update mode */
+ cc2538_reg_t TAPLO : 1; /**< Legacy PWM operation */
+ cc2538_reg_t RESERVED5 : 20; /**< Reserved bits */
+ } TAMRbits;
+ } cc2538_gptimer_tamr;
+
+ /**
+ * @brief Timer B
+ */
+ union {
+ cc2538_reg_t TBMR; /**< GPTIMER Timer B mode */
+ struct {
+ cc2538_reg_t TBMR2 : 2; /**< GPTM Timer B mode */
+ cc2538_reg_t TBCRM : 1; /**< GPTM Timer B capture mode */
+ cc2538_reg_t TBAMS : 1; /**< GPTM Timer B alternate mode */
+ cc2538_reg_t TBCDIR : 1; /**< GPTM Timer B count direction */
+ cc2538_reg_t TBMIE : 1; /**< GPTM Timer B match interrupt enable */
+ cc2538_reg_t TBWOT : 1; /**< GPTM Timer B wait-on-trigger */
+ cc2538_reg_t TBSNAPS : 1; /**< GPTM Timer B snap shot mode */
+ cc2538_reg_t TBILD : 1; /**< GPTM Timer B interval load write */
+ cc2538_reg_t TBPWMIE : 1; /**< GPTM Timer B PWM interrupt enable */
+ cc2538_reg_t TBMRSU : 1; /**< Timer B match register update mode */
+ cc2538_reg_t TBPLO : 1; /**< Legacy PWM operation */
+ cc2538_reg_t RESERVED6 : 20; /**< Reserved bits */
+ } TBMRbits;
+ } cc2538_gptimer_tbmr;
+
+ /**
+ * @brief Timer Control
+ */
+ union {
+ cc2538_reg_t CTL; /**< GPTIMER Control */
+ struct {
+ cc2538_reg_t TAEN : 1; /**< GPTM Timer A enable */
+ cc2538_reg_t TASTALL : 1; /**< GPTM Timer A stall enable */
+ cc2538_reg_t TAEVENT : 1; /**< GPTM Timer A event mode */
+ cc2538_reg_t RESERVED1 : 1; /**< Reserved bits */
+ cc2538_reg_t TAOTE : 1; /**< GPTM Timer A PWM output trigger enable */
+ cc2538_reg_t TAPWML : 1; /**< GPTM Timer A PWM output level */
+ cc2538_reg_t RESERVED2 : 1; /**< Reserved bits */
+ cc2538_reg_t TBEN : 1; /**< GPTM Timer B enable */
+ cc2538_reg_t TBSTALL : 1; /**< GPTM Timer B stall enable */
+ cc2538_reg_t TBEVENT : 1; /**< GPTM Timer B event mode */
+ cc2538_reg_t RESERVED3 : 1; /**< Reserved bits */
+ cc2538_reg_t TBOTE : 1; /**< GPTM Timer B PWM output trigger enable */
+ cc2538_reg_t TBPWML : 1; /**< GPTM Timer B PWM output level */
+ cc2538_reg_t RESERVED4 : 17; /**< Reserved bits */
+ } CTLbits;
+ } cc2538_gptimer_ctl;
+
+ cc2538_reg_t SYNC; /**< GPTIMER Synchronize */
+ cc2538_reg_t RESERVED2; /**< Reserved word */
+ cc2538_reg_t IMR; /**< GPTIMER Interrupt Mask */
+ cc2538_reg_t RIS; /**< GPTIMER Raw Interrupt Status */
+ cc2538_reg_t MIS; /**< GPTIMER Masked Interrupt Status */
+ cc2538_reg_t ICR; /**< GPTIMER Interrupt Clear */
+ cc2538_reg_t TAILR; /**< GPTIMER Timer A Interval Load */
+ cc2538_reg_t TBILR; /**< GPTIMER Timer B Interval Load */
+ cc2538_reg_t TAMATCHR; /**< GPTIMER Timer A Match */
+ cc2538_reg_t TBMATCHR; /**< GPTIMER Timer B Match */
+ cc2538_reg_t TAPR; /**< GPTIMER Timer A Prescale Register */
+ cc2538_reg_t TBPR; /**< GPTIMER Timer B Prescale Register */
+ cc2538_reg_t TAPMR; /**< GPTIMER Timer A Prescale Match Register */
+ cc2538_reg_t TBPMR; /**< GPTIMER Timer B Prescale Match Register */
+ cc2538_reg_t TAR; /**< GPTIMER Timer A */
+ cc2538_reg_t TBR; /**< GPTIMER Timer B */
+ cc2538_reg_t TAV; /**< GPTIMER Timer A Value */
+ cc2538_reg_t TBV; /**< GPTIMER Timer B Value */
+ cc2538_reg_t RESERVED3; /**< Reserved word */
+ cc2538_reg_t TAPS; /**< GPTIMER Timer A Prescale Snapshot */
+ cc2538_reg_t TBPS; /**< GPTIMER Timer B Prescale Snapshot */
+ cc2538_reg_t TAPV; /**< GPTIMER Timer A Prescale Value */
+ cc2538_reg_t TBPV; /**< GPTIMER Timer B Prescale Value */
+ cc2538_reg_t RESERVED[981]; /**< Reserved */
+ cc2538_reg_t PP; /**< GPTIMER Peripheral Properties */
+} cc2538_gptimer_t;
+
+#define GPTIMER0 ( (cc2538_gptimer_t*)0x40030000 ) /**< GPTIMER0 Instance */
+#define GPTIMER1 ( (cc2538_gptimer_t*)0x40031000 ) /**< GPTIMER1 Instance */
+#define GPTIMER2 ( (cc2538_gptimer_t*)0x40032000 ) /**< GPTIMER2 Instance */
+#define GPTIMER3 ( (cc2538_gptimer_t*)0x40033000 ) /**< GPTIMER3 Instance */
+
+void isr_timer0_chan0(void); /**< RIOT Timer 0 Channel 0 Interrupt Service Routine */
+void isr_timer0_chan1(void); /**< RIOT Timer 0 Channel 1 Interrupt Service Routine */
+void isr_timer1_chan0(void); /**< RIOT Timer 1 Channel 0 Interrupt Service Routine */
+void isr_timer1_chan1(void); /**< RIOT Timer 1 Channel 1 Interrupt Service Routine */
+void isr_timer2_chan0(void); /**< RIOT Timer 2 Channel 0 Interrupt Service Routine */
+void isr_timer2_chan1(void); /**< RIOT Timer 2 Channel 1 Interrupt Service Routine */
+void isr_timer3_chan0(void); /**< RIOT Timer 3 Channel 0 Interrupt Service Routine */
+void isr_timer3_chan1(void); /**< RIOT Timer 3 Channel 1 Interrupt Service Routine */
+
+#ifdef __cplusplus
+} /* end extern "C" */
+#endif
+
+#endif /* GPTIMER_H */
+
+/* @} */
diff --git a/cpu/cc2538/include/ioc.h b/cpu/cc2538/include/cc2538_ioc.h
similarity index 90%
rename from cpu/cc2538/include/ioc.h
rename to cpu/cc2538/include/cc2538_ioc.h
index 3a6838bf5e87b8fbe4ada69e76415a6a2b1f5488..58abceea0453417e4a238c44491bd072950128ff 100644
--- a/cpu/cc2538/include/ioc.h
+++ b/cpu/cc2538/include/cc2538_ioc.h
@@ -7,23 +7,21 @@
*/
/**
+ * @defgroup cpu_cc2538_ioc CC2538 I/O Control
+ * @ingroup cpu_cc2538_regs
* @{
*
* @file
* @brief CC2538 I/O Control driver
*
- * @author Ian Martin <ian@locicontrols.com>
- *
- * @addtogroup cpu_cc2538
- * @{
+ * Header file with declarations for the I/O Control module
*
- * @defgroup cc2538-ioc CC2538 I/O Control
+ * @author Ian Martin <ian@locicontrols.com>
*
- * Header file with declarations for the I/O Control module
- * @{
*/
-#ifndef IOC_H_
-#define IOC_H_
+
+#ifndef CC2538_IOC_H_
+#define CC2538_IOC_H_
#include <stdint.h>
@@ -33,8 +31,13 @@
extern "C" {
#endif
+/**
+ * @name Port control register addresses
+ * @{
+ */
#define IOC_PXX_SEL ( (cc2538_reg_t*)0x400d4000 )
#define IOC_PXX_OVER ( (cc2538_reg_t*)0x400d4080 )
+/** @} */
/** @name Peripheral Signal Select Values (for IOC_Pxx_SEL registers)
* @{
@@ -64,7 +67,8 @@ enum {
};
/** @} */
-/** @name Values for IOC_PXX_OVER
+/**
+ * @name Values for IOC_PXX_OVER
* @{
*/
#define IOC_OVERRIDE_OE 0x00000008 /**< Output Enable */
@@ -78,8 +82,5 @@ enum {
} /* end extern "C" */
#endif
-#endif /* IOC_H_ */
-
-/** @} */
-/** @} */
+#endif /* CC2538_IOC_H_ */
/** @} */
diff --git a/cpu/cc2538/include/rfcore.h b/cpu/cc2538/include/cc2538_rfcore.h
similarity index 98%
rename from cpu/cc2538/include/rfcore.h
rename to cpu/cc2538/include/cc2538_rfcore.h
index fa82e5808dfb6497c7f593aa120748bfbeb4a0cf..3da96c5b9f543a88a4ad76c1f47aa84b8377ded7 100644
--- a/cpu/cc2538/include/rfcore.h
+++ b/cpu/cc2538/include/cc2538_rfcore.h
@@ -7,6 +7,8 @@
*/
/**
+ * @defgroup cpu_cc2538_rfcore CC2538 RF core interface
+ * @ingroup cpu_cc2538_regs
* @{
*
* @file
@@ -14,11 +16,6 @@
*
* @author Ian Martin <ian@locicontrols.com>
*
- * @addtogroup cpu_cc2538
- * @{
- *
- * @defgroup cc2538-rfcore CC2538 RF core interface
- * @{
*/
#ifndef CC2538_RFCORE_H
@@ -83,6 +80,9 @@ typedef struct {
cc2538_reg_t XREG_CCACTRL1; /**< RF Other CCA Options */
cc2538_reg_t XREG_RSSI; /**< RF RSSI status register */
+ /**
+ * @brief RSSI status register
+ */
union {
cc2538_reg_t XREG_RSSISTAT; /**< RF RSSI valid status register */
struct {
@@ -105,6 +105,9 @@ typedef struct {
cc2538_reg_t XREG_RFERRM; /**< RF error interrupt mask */
cc2538_reg_t RESERVED3; /**< Reserved bytes */
+ /**
+ * @brief RF random data register
+ */
union {
cc2538_reg_t XREG_RFRND; /**< RF Random data */
struct {
diff --git a/cpu/cc2538/include/soc-adc.h b/cpu/cc2538/include/cc2538_soc_adc.h
similarity index 93%
rename from cpu/cc2538/include/soc-adc.h
rename to cpu/cc2538/include/cc2538_soc_adc.h
index 5adf6cac0aa2a462e08436fa3e9bec125fa22cb1..0caf3f7e7648a20b67feedafc8612cba45462fd6 100644
--- a/cpu/cc2538/include/soc-adc.h
+++ b/cpu/cc2538/include/cc2538_soc_adc.h
@@ -7,7 +7,8 @@
*/
/**
- * @ingroup cpu_cc2538
+ * @defgroup cpu_cc2538_adc CC2538 ADC
+ * @ingroup cpu_cc2538_regs
* @{
*
* @file
@@ -29,6 +30,10 @@ extern "C" {
* @brief SOC ADC component registers
*/
typedef struct {
+
+ /**
+ * @brief ADC control register
+ */
union {
cc2538_reg_t ADCCON1; /**< ADC Control Register 1 */
struct {
diff --git a/cpu/cc2538/include/sys-ctrl.h b/cpu/cc2538/include/cc2538_sys_ctrl.h
similarity index 95%
rename from cpu/cc2538/include/sys-ctrl.h
rename to cpu/cc2538/include/cc2538_sys_ctrl.h
index bf2340db87c0eb1bcd8621dbc0ccddb10747a629..65dfc659f57254c2203c5bebb1c42af160905ba9 100644
--- a/cpu/cc2538/include/sys-ctrl.h
+++ b/cpu/cc2538/include/cc2538_sys_ctrl.h
@@ -7,7 +7,8 @@
*/
/**
- * @ingroup cpu_cc2538
+ * @defgroup cpu_cc2538_sysctrl CC2538 System Control
+ * @ingroup cpu_cc2538_regs
* @{
*
* @file
@@ -29,6 +30,10 @@ extern "C" {
* @brief System Control component registers
*/
typedef struct {
+
+ /**
+ * @brief Clock control register
+ */
union {
cc2538_reg_t CLOCK_CTRL; /**< Clock control register */
struct {
@@ -47,6 +52,9 @@ typedef struct {
} CLOCK_CTRLbits;
} cc2538_sys_ctrl_clk_ctrl;
+ /**
+ * @brief Clock status register
+ */
union {
cc2538_reg_t CLOCK_STA; /**< Clock status register */
struct {
@@ -77,6 +85,9 @@ typedef struct {
cc2538_reg_t DCGCSSI; /**< Module clocks for SSI[1:0] when the CPU is in PM0 */
cc2538_reg_t SRSSI; /**< Reset for SSI[1:0]. */
+ /**
+ * @brief UART module clock register - active mode
+ */
union {
cc2538_reg_t RCGCUART; /**< Module clocks for UART[1:0] when the CPU is in active (run) mode */
struct {
@@ -86,6 +97,9 @@ typedef struct {
} RCGCUARTbits;
} cc2538_sys_ctrl_unnamed1;
+ /**
+ * @brief UART module clock register - sleep mode
+ */
union {
cc2538_reg_t SCGCUART; /**< Module clocks for UART[1:0] when the CPU is in sleep mode */
struct {
@@ -95,6 +109,9 @@ typedef struct {
} SCGCUARTbits;
} cc2538_sys_ctrl_unnamed2;
+ /**
+ * @brief UART module clock register - PM0 mode
+ */
union {
cc2538_reg_t DCGCUART; /**< Module clocks for UART[1:0] when the CPU is in PM0 */
struct {
diff --git a/cpu/cc2538/include/cc2538-uart.h b/cpu/cc2538/include/cc2538_uart.h
similarity index 94%
rename from cpu/cc2538/include/cc2538-uart.h
rename to cpu/cc2538/include/cc2538_uart.h
index 46c59777638a82858120856757372fe7f8d6f89a..0fd671a983c2552ff6010685c5c16fde6763c82b 100644
--- a/cpu/cc2538/include/cc2538-uart.h
+++ b/cpu/cc2538/include/cc2538_uart.h
@@ -7,7 +7,8 @@
*/
/**
- * @addtogroup cpu_cc2538
+ * @defgroup cpu_cc2538_uart CC2538 UART
+ * @ingroup cpu_cc2538_regs
* @{
*
* @file
@@ -31,6 +32,9 @@ extern "C" {
typedef struct {
cc2538_reg_t DR; /**< UART Data Register */
+ /**
+ * @brief Status register
+ */
union {
cc2538_reg_t RSR; /**< UART receive status and error clear */
cc2538_reg_t ECR; /**< UART receive status and error clear */
@@ -38,6 +42,9 @@ typedef struct {
cc2538_reg_t RESERVED1[4]; /**< Reserved addresses */
+ /**
+ * @brief Flag register
+ */
union {
cc2538_reg_t FR; /**< UART Flag Register */
struct {
@@ -57,6 +64,9 @@ typedef struct {
cc2538_reg_t IBRD; /**< UART Integer Baud-Rate Divisor */
cc2538_reg_t FBRD; /**< UART Fractional Baud-Rate Divisor */
+ /**
+ * @brief Line control register
+ */
union {
cc2538_reg_t LCRH; /**< UART Line Control Register */
struct {
@@ -71,6 +81,9 @@ typedef struct {
} LCRHbits;
} cc2538_uart_lcrh;
+ /**
+ * @brief Control register
+ */
union {
cc2538_reg_t CTL; /**< UART Control */
struct {
@@ -91,6 +104,9 @@ typedef struct {
} CTLbits;
} cc2538_uart_ctl;
+ /**
+ * @brief Interrupt FIFO level select register
+ */
union {
cc2538_reg_t IFLS; /**< UART interrupt FIFO Level Select */
struct {
@@ -100,6 +116,9 @@ typedef struct {
} IFLSbits;
} cc2538_uart_ifls;
+ /**
+ * @brief Interrupt mask register
+ */
union {
cc2538_reg_t IM; /**< UART Interrupt Mask */
struct {
@@ -122,6 +141,9 @@ typedef struct {
cc2538_reg_t RIS; /**< UART Raw Interrupt Status */
+ /**
+ * @brief Masked interrupt status register
+ */
union {
cc2538_reg_t MIS; /**< UART Masked Interrupt Status */
struct {
diff --git a/cpu/cc2538/include/cpu_conf.h b/cpu/cc2538/include/cpu_conf.h
index 7b5a98532acb5f8b2c668a643c1d4c0c406d4f73..e415ccdf91d7837edd2efcb4f866f6d583f27c43 100644
--- a/cpu/cc2538/include/cpu_conf.h
+++ b/cpu/cc2538/include/cpu_conf.h
@@ -20,13 +20,13 @@
#define __CPU_CONF_H
#include "cc2538.h"
-#include "cc2538-gpio.h"
-#include "cc2538-uart.h"
-#include "gptimer.h"
-#include "ioc.h"
-#include "soc-adc.h"
-#include "rfcore.h"
-#include "sys-ctrl.h"
+#include "cc2538_gpio.h"
+#include "cc2538_uart.h"
+#include "cc2538_gptimer.h"
+#include "cc2538_ioc.h"
+#include "cc2538_soc_adc.h"
+#include "cc2538_rfcore.h"
+#include "cc2538_sys_ctrl.h"
#ifdef __cplusplus
extern "C" {
diff --git a/cpu/cc2538/include/gptimer.h b/cpu/cc2538/include/gptimer.h
deleted file mode 100644
index f90c5f90d73f64e9e1d93fd853b0c0baf55521f7..0000000000000000000000000000000000000000
--- a/cpu/cc2538/include/gptimer.h
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * Copyright (C) 2014 Loci Controls Inc.
- *
- * This file is subject to the terms and conditions of the GNU Lesser
- * General Public License v2.1. See the file LICENSE in the top level
- * directory for more details.
- */
-
-/**
- * @addtogroup cpu_cc2538
- * @{
- *
- * @file
- * @brief CC2538 General Purpose Timer (GPTIMER) driver
- *
- * @author Ian Martin <ian@locicontrols.com>
- */
-
-#ifndef GPTIMER_H
-#define GPTIMER_H
-
-#include <stdint.h>
-
-#include "cc2538.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define GPTIMER_NUMOF 4 /**< The CC2538 has four general-purpose timer units. */
-#define NUM_CHANNELS_PER_GPTIMER 2 /**< Each G.P. timer unit has two channels: A and B. */
-
-enum {
- GPTIMER_ONE_SHOT_MODE = 1, /**< GPTIMER one-shot mode */
- GPTIMER_PERIODIC_MODE = 2, /**< GPTIMER periodic mode */
- GPTIMER_CAPTURE_MODE = 3, /**< GPTIMER capture mode */
-};
-
-enum {
- GPTMCFG_32_BIT_TIMER = 0, /**< 32-bit timer configuration */
- GPTMCFG_32_BIT_REAL_TIME_CLOCK = 1, /**< 32-bit real-time clock */
- GPTMCFG_16_BIT_TIMER = 4, /**< 16-bit timer configuration */
-};
-
-/**
- * @brief GPTIMER component registers
- */
-typedef struct {
- cc2538_reg_t CFG; /**< GPTIMER Configuration */
-
- union {
- cc2538_reg_t TAMR; /**< GPTIMER Timer A mode */
- struct {
- cc2538_reg_t TAMR2 : 2; /**< GPTM Timer A mode */
- cc2538_reg_t TACRM : 1; /**< GPTM Timer A capture mode */
- cc2538_reg_t TAAMS : 1; /**< GPTM Timer A alternate mode */
- cc2538_reg_t TACDIR : 1; /**< GPTM Timer A count direction */
- cc2538_reg_t TAMIE : 1; /**< GPTM Timer A match interrupt enable */
- cc2538_reg_t TAWOT : 1; /**< GPTM Timer A wait-on-trigger */
- cc2538_reg_t TASNAPS : 1; /**< GPTM Timer A snap shot mode */
- cc2538_reg_t TAILD : 1; /**< GPTM Timer A interval load write */
- cc2538_reg_t TAPWMIE : 1; /**< GPTM Timer A PWM interrupt enable */
- cc2538_reg_t TAMRSU : 1; /**< Timer A match register update mode */
- cc2538_reg_t TAPLO : 1; /**< Legacy PWM operation */
- cc2538_reg_t RESERVED5 : 20; /**< Reserved bits */
- } TAMRbits;
- } cc2538_gptimer_tamr;
-
- union {
- cc2538_reg_t TBMR; /**< GPTIMER Timer B mode */
- struct {
- cc2538_reg_t TBMR2 : 2; /**< GPTM Timer B mode */
- cc2538_reg_t TBCRM : 1; /**< GPTM Timer B capture mode */
- cc2538_reg_t TBAMS : 1; /**< GPTM Timer B alternate mode */
- cc2538_reg_t TBCDIR : 1; /**< GPTM Timer B count direction */
- cc2538_reg_t TBMIE : 1; /**< GPTM Timer B match interrupt enable */
- cc2538_reg_t TBWOT : 1; /**< GPTM Timer B wait-on-trigger */
- cc2538_reg_t TBSNAPS : 1; /**< GPTM Timer B snap shot mode */
- cc2538_reg_t TBILD : 1; /**< GPTM Timer B interval load write */
- cc2538_reg_t TBPWMIE : 1; /**< GPTM Timer B PWM interrupt enable */
- cc2538_reg_t TBMRSU : 1; /**< Timer B match register update mode */
- cc2538_reg_t TBPLO : 1; /**< Legacy PWM operation */
- cc2538_reg_t RESERVED6 : 20; /**< Reserved bits */
- } TBMRbits;
- } cc2538_gptimer_tbmr;
-
- union {
- cc2538_reg_t CTL; /**< GPTIMER Control */
- struct {
- cc2538_reg_t TAEN : 1; /**< GPTM Timer A enable */
- cc2538_reg_t TASTALL : 1; /**< GPTM Timer A stall enable */
- cc2538_reg_t TAEVENT : 1; /**< GPTM Timer A event mode */
- cc2538_reg_t RESERVED1 : 1; /**< Reserved bits */
- cc2538_reg_t TAOTE : 1; /**< GPTM Timer A PWM output trigger enable */
- cc2538_reg_t TAPWML : 1; /**< GPTM Timer A PWM output level */
- cc2538_reg_t RESERVED2 : 1; /**< Reserved bits */
- cc2538_reg_t TBEN : 1; /**< GPTM Timer B enable */
- cc2538_reg_t TBSTALL : 1; /**< GPTM Timer B stall enable */
- cc2538_reg_t TBEVENT : 1; /**< GPTM Timer B event mode */
- cc2538_reg_t RESERVED3 : 1; /**< Reserved bits */
- cc2538_reg_t TBOTE : 1; /**< GPTM Timer B PWM output trigger enable */
- cc2538_reg_t TBPWML : 1; /**< GPTM Timer B PWM output level */
- cc2538_reg_t RESERVED4 : 17; /**< Reserved bits */
- } CTLbits;
- } cc2538_gptimer_ctl;
-
- cc2538_reg_t SYNC; /**< GPTIMER Synchronize */
- cc2538_reg_t RESERVED2; /**< Reserved word */
- cc2538_reg_t IMR; /**< GPTIMER Interrupt Mask */
- cc2538_reg_t RIS; /**< GPTIMER Raw Interrupt Status */
- cc2538_reg_t MIS; /**< GPTIMER Masked Interrupt Status */
- cc2538_reg_t ICR; /**< GPTIMER Interrupt Clear */
- cc2538_reg_t TAILR; /**< GPTIMER Timer A Interval Load */
- cc2538_reg_t TBILR; /**< GPTIMER Timer B Interval Load */
- cc2538_reg_t TAMATCHR; /**< GPTIMER Timer A Match */
- cc2538_reg_t TBMATCHR; /**< GPTIMER Timer B Match */
- cc2538_reg_t TAPR; /**< GPTIMER Timer A Prescale Register */
- cc2538_reg_t TBPR; /**< GPTIMER Timer B Prescale Register */
- cc2538_reg_t TAPMR; /**< GPTIMER Timer A Prescale Match Register */
- cc2538_reg_t TBPMR; /**< GPTIMER Timer B Prescale Match Register */
- cc2538_reg_t TAR; /**< GPTIMER Timer A */
- cc2538_reg_t TBR; /**< GPTIMER Timer B */
- cc2538_reg_t TAV; /**< GPTIMER Timer A Value */
- cc2538_reg_t TBV; /**< GPTIMER Timer B Value */
- cc2538_reg_t RESERVED3; /**< Reserved word */
- cc2538_reg_t TAPS; /**< GPTIMER Timer A Prescale Snapshot */
- cc2538_reg_t TBPS; /**< GPTIMER Timer B Prescale Snapshot */
- cc2538_reg_t TAPV; /**< GPTIMER Timer A Prescale Value */
- cc2538_reg_t TBPV; /**< GPTIMER Timer B Prescale Value */
- cc2538_reg_t RESERVED[981];
- cc2538_reg_t PP; /**< GPTIMER Peripheral Properties */
-} cc2538_gptimer_t;
-
-#define GPTIMER0 ( (cc2538_gptimer_t*)0x40030000 ) /**< GPTIMER0 Instance */
-#define GPTIMER1 ( (cc2538_gptimer_t*)0x40031000 ) /**< GPTIMER1 Instance */
-#define GPTIMER2 ( (cc2538_gptimer_t*)0x40032000 ) /**< GPTIMER2 Instance */
-#define GPTIMER3 ( (cc2538_gptimer_t*)0x40033000 ) /**< GPTIMER3 Instance */
-
-void isr_timer0_chan0(void); /**< RIOT Timer 0 Channel 0 Interrupt Service Routine */
-void isr_timer0_chan1(void); /**< RIOT Timer 0 Channel 1 Interrupt Service Routine */
-void isr_timer1_chan0(void); /**< RIOT Timer 1 Channel 0 Interrupt Service Routine */
-void isr_timer1_chan1(void); /**< RIOT Timer 1 Channel 1 Interrupt Service Routine */
-void isr_timer2_chan0(void); /**< RIOT Timer 2 Channel 0 Interrupt Service Routine */
-void isr_timer2_chan1(void); /**< RIOT Timer 2 Channel 1 Interrupt Service Routine */
-void isr_timer3_chan0(void); /**< RIOT Timer 3 Channel 0 Interrupt Service Routine */
-void isr_timer3_chan1(void); /**< RIOT Timer 3 Channel 1 Interrupt Service Routine */
-
-#ifdef __cplusplus
-} /* end extern "C" */
-#endif
-
-#endif /* GPTIMER_H */
-
-/* @} */