diff --git a/arch/x64/msr.hh b/arch/x64/msr.hh
index 2181b312f2dc4f1b21db35cdc6edf01b9fcc773c..7d91e1e3bcb394f26698f55aaea35166b6994d99 100644
--- a/arch/x64/msr.hh
+++ b/arch/x64/msr.hh
@@ -65,6 +65,11 @@ inline void wrmsr(msr index, u64 value)
     wrmsr(static_cast<u32>(index), value);
 }
 
+inline void wrmsr_safe(msr index, u64 value)
+{
+    wrmsr_safe(static_cast<u32>(index), value);
+}
+
 inline u64 rdmsr(msr index)
 {
     return rdmsr(static_cast<u32>(index));
diff --git a/arch/x64/processor.hh b/arch/x64/processor.hh
index 7c66a24d635b95fadf47e8d51ae7f573edbc751e..21c9e0df72a94a72ae6f6f4049715af095c048f7 100644
--- a/arch/x64/processor.hh
+++ b/arch/x64/processor.hh
@@ -202,6 +202,27 @@ inline void wrmsr(u32 index, u64 data) {
     asm volatile ("wrmsr" : : "c"(index), "a"(lo), "d"(hi));
 }
 
+inline bool wrmsr_safe(u32 index, u64 data) {
+    u32 lo = data, hi = data >> 32;
+
+    bool ret = true;
+    asm volatile ("1: \n\t"
+                  "wrmsr\n\t"
+                  "2: \n\t"
+                  ".pushsection .text.fixup, \"ax\" \n\t"
+                  "3: \n\t"
+                  "xor %[ret], %[ret]\n\t"
+                  "jmp 2b \n\t"
+                  ".popsection \n\t"
+                  ".pushsection .fixup, \"a\" \n\t"
+                  ".quad 1b, 3b \n\t"
+                  ".popsection\n"
+            :  [ret]"+r"(ret)
+            : "c"(index), "a"(lo), "d"(hi));
+
+    return ret;
+}
+
 inline void wrfsbase(u64 data)
 {
     asm volatile("wrfsbase %0" : : "r"(data));