dw1000: Double buffer now supported

Inc/dw1000_util.h

@@ -4,7 +4,7 @@
 #include <stdint.h>
 #include <string.h>
 #include "deca_regs.h"
-
+//#define DOUBLE_BUFFER
 
 //DECA:Defines for enable_clocks function
 #define FORCE_SYS_XTI  0
@@ -88,8 +88,6 @@ extern const uint16_t lde_replicaCoeff[PCODES];
 
 #define DEBUG
 
-
-
 void dw1000Util_enableclocks(int clocks);
 void dw1000Util_enableRX();
 uint32_t dw1000Util_otpread(uint32_t address);

Src/dw1000.c

@@ -137,14 +137,20 @@ int dw1000_init(uint16_t config, BaseType_t (*sendCallback)(),
 	dw1000Hal_readRegister(SYS_CFG_ID, (uint8_t *) &dw1000local.sysCFGreg,
 	SYS_CFG_LEN);
 
+#ifdef DOUBLE_BUFFER
+	 //Enable double buffer
+	dw1000local.sysCFGreg &= (~SYS_CFG_DIS_DRXB);
+	dw1000Hal_writeRegister(SYS_CFG_ID, (uint8_t *) &dw1000local.sysCFGreg,
+	SYS_CFG_LEN);
+#endif
 
-	uint32_t event_clear = 0xFFFFFFFF;
-	dw1000Hal_writeRegister(SYS_STATUS_ID, (uint8_t*) &event_clear,
-	SYS_STATUS_LEN);
 
 
 	//Enable Receiver
 	dw1000Util_enableRX();
+	uint32_t event_clear = 0xFFFFFFFF;
+	dw1000Hal_writeRegister(SYS_STATUS_ID, (uint8_t*) &event_clear,
+	SYS_STATUS_LEN);
 
 	return 0;
 }
@@ -172,10 +178,10 @@ int dw1000_configure(dwt_config_t *config, uint8_t use_otpconfigvalues) {
 
 	dw1000local.sysCFGreg |= (SYS_CFG_PHR_MODE_11 & (config->phrMode << 16)); //Set to enable PhyHdr for long frames
 
-	dw1000local.sysCFGreg |= (1 << 29); //RXAUTR
+	dw1000local.sysCFGreg |= (SYS_CFG_RXAUTR); //Automatic reenable of the receiver
 
-	dw1000Hal_writeRegister(SYS_CFG_ID, (uint8_t *) &dw1000local.sysCFGreg,
-	SYS_CFG_LEN);
+
+	dw1000Hal_writeRegister(SYS_CFG_ID, (uint8_t *) &dw1000local.sysCFGreg, SYS_CFG_LEN);
 
 	//DECA:write/set the lde_replicaCoeff
 	dw1000Hal_writeSubRegister(LDE_IF_ID, LDE_REPC_OFFSET, (uint8_t *) &reg16,

Src/dw1000_isr.c

@@ -36,6 +36,11 @@ BaseType_t dw1000Hal_handleRx(uint64_t * event, uint64_t * event_clear) {
 	} else if (dw1000local.taskHandle != NULL) {
 		//TODO Notify taskHandle
 	}
+#ifdef DOUBLE_BUFFER
+	if((*event & SYS_STATUS_HSRBP) != (*event & SYS_STATUS_ICRBP)){
+		*event_clear |= *event & CLEAR_DBLBUFF_EVENTS  ;
+	}
+#endif
 
 	//Set the clear bits.
 	*event_clear |= CLEAR_ALLRXGOOD_EVENTS;
@@ -71,12 +76,17 @@ void dw1000Isr_handleInterrupt(void) {
 	} else if ((event
 			& ( SYS_STATUS_RXFCG | SYS_STATUS_RXPHD | SYS_STATUS_RXSFDD))
 			!= (SYS_STATUS_RXFCG | SYS_STATUS_RXPHD | SYS_STATUS_RXSFDD)) {
+
+#ifdef DOUBLE_BUFFER
+		dw1000Hal_handleRx(&event, &event_clear);
+#else
 		//Error Case
 		trace_printf("Error!\n");
-		hexdump(event, 5);
+		hexdump(&event, 5);
 		event_clear |= CLEAR_ALLRXERROR_EVENTS;
 		event_clear |= CLEAR_ALLRXGOOD_EVENTS;
 		dw1000Util_enableRX();
+#endif
 	} else {
 		dw1000Hal_handleRx(&event, &event_clear);
 	}

Src/dw1000_util.c

@@ -225,6 +225,19 @@ void dw1000Util_enableclocks(int clocks)
 
 
 void dw1000Util_enableRX(){
+#ifdef DOUBLE_BUFFER
+	//Align HSRBP and ICRBP if needed (see page 37 in the Usermanual)
+	uint64_t event = 0;
+	dw1000Hal_readRegisterFromIsr(SYS_STATUS_ID, (uint8_t*) &event,
+	SYS_STATUS_LEN);
+	if((event & SYS_STATUS_HSRBP) != (event & SYS_STATUS_ICRBP)){
+		uint32_t reg;
+		dw1000Hal_readRegisterFromIsr(SYS_CTRL_ID, (uint8_t *)&reg, SYS_CTRL_LEN);
+		reg |= SYS_CTRL_HSRBTOGGLE;
+		dw1000Hal_writeRegisterFromIsr(SYS_CTRL_ID, (uint8_t *)&reg, SYS_CTRL_LEN);
+	}
+#endif
+
 	uint32_t sys_ctrl = 0;
 	dw1000Hal_readRegisterFromIsr(SYS_CTRL_ID, (uint8_t*) &sys_ctrl,
 	SYS_CTRL_LEN); // switch to rx mode