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    35635e40
    stm32f3: periph: uart: add misssing uart overrun handling · 35635e40
    Steffen Pengel authored
    On overrung the ORE bit in the ORECF register is set.
    An overrun error occurs when a character is received when RXNE has not been reset. Data
    can not be transferred from the shift register to the RDR register until the RXNE bit is
    cleared. The ORE bit is reset by setting the ORECF bit in the ICR register.
    
    In case the ORE bit isn't cleared, the isr_handler() routine is called
    continuously. Which prevents the system from normal scheduling.
    35635e40
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    stm32f3: periph: uart: add misssing uart overrun handling
    Steffen Pengel authored
    On overrung the ORE bit in the ORECF register is set.
    An overrun error occurs when a character is received when RXNE has not been reset. Data
    can not be transferred from the shift register to the RDR register until the RXNE bit is
    cleared. The ORE bit is reset by setting the ORECF bit in the ICR register.
    
    In case the ORE bit isn't cleared, the isr_handler() routine is called
    continuously. Which prevents the system from normal scheduling.