cpu/sam3: s/F_CPU/CLOCK_CORECLOCK/

cpu/sam3/periph/pwm.c

@@ -73,18 +73,18 @@ int pwm_init(pwm_t dev, pwm_mode_t mode,
      * The pwm provides 11 prescaled clocks with (MCK/2^prea | prea=[0,10])
      * and a divider (diva) with a denominator range [1,255] in line.
      */
-    if (F_CPU < pwm_clk) {  /* Have to cut down resulting frequency. */
-        frequency = F_CPU / resolution;
+    if (CLOCK_CORECLOCK < pwm_clk) {  /* Have to cut down resulting frequency. */
+        frequency = CLOCK_CORECLOCK / resolution;
     }
     else {   /* Estimate prescaler and divider. */
-        diva = F_CPU / pwm_clk;
+        diva = CLOCK_CORECLOCK / pwm_clk;
 
         while ((prea < MCK_DIV_LB_MAX) && (~0xff & diva)) {
             prea = prea + 1;
             diva = diva >> 1;
         }
 
-        frequency = F_CPU / ((resolution * diva) << prea);
+        frequency = CLOCK_CORECLOCK / ((resolution * diva) << prea);
     }
 
     retval = frequency;

cpu/sam3/periph/timer.c

@@ -117,7 +117,7 @@ int timer_init(tim_t dev, unsigned int ticks_per_us, void (*callback)(int))
      * channel 2 toggles this line on each timer tick, the actual frequency driving ch0/1
      * is f_ch2 / 2 --> f_ch0/1 = (MCK / 2 / 2 / 1000000) * ticks_per_us.
      */
-    tim->TC_CHANNEL[2].TC_RC = ((F_CPU / 1000000) / 4) * ticks_per_us;
+    tim->TC_CHANNEL[2].TC_RC = ((CLOCK_CORECLOCK / 1000000) / 4) * ticks_per_us;
 
     /* start channel 2 */
     tim->TC_CHANNEL[2].TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;

cpu/sam3/periph/uart.c

@@ -63,7 +63,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
                                              uart_config[uart].tx_pin);
 
     /* configure baud rate and set mode to 8N1 */
-    dev->UART_BRGR = (F_CPU / (16 * baudrate));
+    dev->UART_BRGR = (CLOCK_CORECLOCK / (16 * baudrate));
     dev->UART_MR = UART_MR_PAR_NO | US_MR_CHRL_8_BIT;
     dev->UART_CR = UART_CR_RXEN | UART_CR_TXEN | UART_CR_RSTSTA;