cpu/stm32f4: adapted to GPIO changes

cpu/stm32f4/include/periph_cpu.h

@@ -76,6 +76,31 @@ typedef enum {
 } adc_res_t;
 /** @} */
 
+/**
+ * @brief   Generate GPIO mode bitfields
+ *
+ * We use 5 bit to encode the mode:
+ * - bit 0+1: pin mode (input / output)
+ * - bit 2+3: pull resistor configuration
+ * - bit   4: output type (0: push-pull, 1: open-drain)
+ */
+#define GPIO_MODE(io, pr, ot)   ((io << 0) | (pr << 2) | (ot << 4))
+
+/**
+ * @brief   Override GPIO mode options
+ * @{
+ */
+#define HAVE_GPIO_MODE_T
+typedef enum {
+    GPIO_IN    = GPIO_MODE(0, 0, 0),    /**< input w/o pull R */
+    GPIO_IN_PD = GPIO_MODE(0, 2, 0),    /**< input with pull-down */
+    GPIO_IN_PU = GPIO_MODE(0, 1, 0),    /**< input with pull-up */
+    GPIO_OUT   = GPIO_MODE(1, 0, 0),    /**< push-pull output */
+    GPIO_OD    = GPIO_MODE(1, 0, 1),    /**< open-drain w/o pull R */
+    GPIO_OD_PU = GPIO_MODE(1, 1, 1)     /**< open-drain with pull-up */
+} gpio_mode_t;
+/** @} */
+
 /**
  * @brief   Available ports on the STM32F4 family
  */

cpu/stm32f4/periph/gpio.c

@@ -62,32 +62,31 @@ static inline int _pin_num(gpio_t pin)
     return (pin & 0x0f);
 }
 
-int gpio_init(gpio_t pin, gpio_dir_t dir, gpio_pp_t pullup)
+int gpio_init(gpio_t pin, gpio_mode_t mode)
 {
     GPIO_TypeDef *port = _port(pin);
     int pin_num = _pin_num(pin);
 
     /* enable clock */
     RCC->AHB1ENR |= (RCC_AHB1ENR_GPIOAEN << _port_num(pin));
-    /* configure pull register */
-    port->PUPDR &= ~(3 << (2 * pin_num));
-    port->PUPDR |= (pullup << (2 * pin_num));
-    /* set direction */
-    if (dir == GPIO_DIR_OUT) {
-        port->MODER &= ~(3 << (2 * pin_num));   /* set pin to output mode */
-        port->MODER |= (1 << (2 * pin_num));
-        port->OTYPER &= ~(1 << pin_num);        /* set to push-pull */
-        port->OSPEEDR |= (3 << (2 * pin_num));  /* set to high speed */
-        port->ODR &= ~(1 << pin_num);           /* set pin to low signal */
-    }
-    else {
-        port->MODER &= ~(3 << (2 * pin_num));   /* configure pin as input */
-    }
+
+    /* set mode */
+    port->MODER &= ~(0x3 << (2 * pin_num));
+    port->MODER |=  ((mode & 0x3) << (2 * pin_num));
+    /* set pull resistor configuration */
+    port->PUPDR &= ~(0x3 << (2 * pin_num));
+    port->PUPDR |=  (((mode >> 2) & 0x3) << (2 * pin_num));
+    /* set output mode */
+    port->OTYPER &= ~(1 << pin_num);
+    port->OTYPER |=  (((mode >> 4) & 0x1) << pin_num);
+    /* reset speed value and clear pin */
+    port->OSPEEDR |= (3 << (2 * pin_num));
+    port->BSRRH = (1 << pin_num);
+
     return 0;
 }
 
-int gpio_init_int(gpio_t pin,
-                   gpio_pp_t pullup, gpio_flank_t flank,
+int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
                    gpio_cb_t cb, void *arg)
 {
     int pin_num = _pin_num(pin);
@@ -99,7 +98,7 @@ int gpio_init_int(gpio_t pin,
     /* enable the SYSCFG clock */
     RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
     /* initialize pin as input */
-    gpio_init(pin, GPIO_DIR_IN, pullup);
+    gpio_init(pin, mode);
     /* enable global pin interrupt */
     if (pin_num < 5) {
         NVIC_EnableIRQ(EXTI0_IRQn + pin_num);

cpu/stm32f4/periph/uart.c

@@ -69,8 +69,8 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
     mutex_lock(&_tx_dma_sync[uart]);
 
     /* configure pins */
-    gpio_init(uart_config[uart].rx_pin, GPIO_DIR_IN, GPIO_NOPULL);
-    gpio_init(uart_config[uart].tx_pin, GPIO_DIR_OUT, GPIO_NOPULL);
+    gpio_init(uart_config[uart].rx_pin, GPIO_IN);
+    gpio_init(uart_config[uart].tx_pin, GPIO_OUT);
     gpio_init_af(uart_config[uart].rx_pin, uart_config[uart].af);
     gpio_init_af(uart_config[uart].tx_pin, uart_config[uart].af);
     /* enable UART clock */