Merge pull request #8802 from basilfx/feature/efm32_slstk3402a

boards: slstk3402a: add support

boards/slstk3402a/Makefile

+MODULE = board
+
+DIRS = $(RIOTBOARD)/common/silabs
+
+include $(RIOTBASE)/Makefile.base

boards/slstk3402a/Makefile.dep

+ifneq (,$(filter saul_default,$(USEMODULE)))
+  USEMODULE += saul_gpio
+endif
+
+# include board common dependencies
+include $(RIOTBOARD)/common/silabs/Makefile.dep
+
+include $(RIOTCPU)/efm32/Makefile.dep

boards/slstk3402a/Makefile.features

+# Put defined MCU peripherals here (in alphabetical order)
+FEATURES_PROVIDED += periph_adc
+FEATURES_PROVIDED += periph_gpio
+FEATURES_PROVIDED += periph_rtc
+FEATURES_PROVIDED += periph_rtt
+FEATURES_PROVIDED += periph_spi
+FEATURES_PROVIDED += periph_timer
+FEATURES_PROVIDED += periph_uart
+
+# The board MPU family (used for grouping by the CI system)
+FEATURES_MCU_GROUP = cortex_m4_2
+
+-include $(RIOTCPU)/efm32/Makefile.features

boards/slstk3402a/Makefile.include

+# define the cpu used by SLSTK3402A
+export CPU = efm32
+export CPU_MODEL = efm32pg12b500f1024gl125
+
+# set default port depending on operating system
+PORT_LINUX ?= /dev/ttyACM0
+PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
+
+# setup serial terminal
+include $(RIOTMAKE)/tools/serial.inc.mk
+
+# setup JLink for flashing
+export JLINK_DEVICE := $(CPU_MODEL)
+include $(RIOTMAKE)/tools/jlink.inc.mk
+
+# add board common drivers
+USEMODULE += boards_common_silabs
+USEMODULE += silabs_aem
+USEMODULE += silabs_bc
+
+# include board common
+include $(RIOTBOARD)/common/silabs/Makefile.include

boards/slstk3402a/board.c

+/*
+ * Copyright (C) 2015-2018 Freie Universität Berlin
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_slstk3402a
+ * @{
+ *
+ * @file
+ * @brief       Board specific implementations SLSTK3402A board
+ *
+ * @author      Hauke Petersen <hauke.petersen@fu-berlin.de>
+ * @author      Bas Stottelaar <basstottelaar@gmail.com>
+ *
+ * @}
+ */
+
+#include "board.h"
+#include "board_common.h"
+#include "periph/gpio.h"
+
+void board_init(void)
+{
+    /* initialize the CPU */
+    cpu_init();
+
+    /* perform common board initialization */
+    board_common_init();
+
+#ifdef MODULE_SI7021
+    /* initialize the Si7021 sensor */
+    gpio_init(SI7021_EN_PIN, GPIO_OUT);
+    gpio_set(SI7021_EN_PIN);
+#endif
+}

boards/slstk3402a/include/board.h

+/*
+ * Copyright (C) 2015-2018 Freie Universität Berlin
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @defgroup    boards_slstk3402a Silicon Labs SLSTK3402A starter kit
+ * @ingroup     boards
+ * @brief       Support for the Silicon Labs SLSTK3402A starter kit
+ * @{
+ *
+ * @file
+ * @brief       Board specific definitions for the SLSTK3402A starter kit
+ *
+ * @author      Hauke Petersen <hauke.petersen@fu-berlin.de>
+ * @author      Bas Stottelaar <basstottelaar@gmail.com>
+ */
+
+#ifndef BOARD_H
+#define BOARD_H
+
+#include "cpu.h"
+#include "periph_conf.h"
+#include "periph/gpio.h"
+#include "periph/spi.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @name    Xtimer configuration
+ *
+ * The timer runs at 250 KHz to increase accuracy.
+ * @{
+ */
+#define XTIMER_HZ           (250000UL)
+#define XTIMER_WIDTH        (16)
+/** @} */
+
+/**
+ * @name    Board controller configuration
+ *
+ * Define the GPIO pin to enable the BC, to allow serial communication
+ * via the USB port.
+ * @{
+ */
+#define BC_PIN              GPIO_PIN(PA, 5)
+/** @} */
+
+/**
+ * @name    Push button pin definitions
+ * @{
+ */
+#define PB0_PIN             GPIO_PIN(PF, 6)
+#define PB1_PIN             GPIO_PIN(PF, 7)
+/** @} */
+
+/**
+ * @name    LED pin definitions
+ * @{
+ */
+#define LED0_PIN            GPIO_PIN(PF, 4)
+#define LED1_PIN            GPIO_PIN(PF, 5)
+/** @} */
+
+/**
+ * @name    Macros for controlling the on-board LEDs
+ * @{
+ */
+#define LED0_ON             gpio_set(LED0_PIN)
+#define LED0_OFF            gpio_clear(LED0_PIN)
+#define LED0_TOGGLE         gpio_toggle(LED0_PIN)
+#define LED1_ON             gpio_set(LED1_PIN)
+#define LED1_OFF            gpio_clear(LED1_PIN)
+#define LED1_TOGGLE         gpio_toggle(LED1_PIN)
+/** @} */
+
+/**
+ * @name    Display configuration
+ *
+ * Connection to the on-board Sharp Memory LCD (LS013B7DH03).
+ * @{
+ */
+#define DISP_SPI            SPI_DEV(0)
+#define DISP_COM_PIN        GPIO_PIN(PD, 13)
+#define DISP_CS_PIN         GPIO_PIN(PD, 14)
+#define DISP_EN_PIN         GPIO_PIN(PD, 15)
+/** @} */
+
+/**
+ * @name    Temperature sensor configuration
+ *
+ * Connection to the on-board temperature/humidity sensor (Si7021).
+ * @{
+ */
+#ifndef SI7021_ENABLED
+#define SI7021_ENABLED          (1)
+#endif
+#define SI7021_I2C              I2C_DEV(0)
+#define SI7021_EN_PIN           GPIO_PIN(PB, 10)
+
+#define SI70XX_PARAM_I2C_DEV    SI7021_I2C
+/** @} */
+
+/**
+ * @brief   Initialize the board (GPIO, sensors, clocks).
+ */
+void board_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H */
+/** @} */

boards/slstk3402a/include/gpio_params.h

+/*
+ * Copyright (C) 2016-2017 Bas Stottelaar <basstottelaar@gmail.com>
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_slstk3402a
+ * @{
+ *
+ * @file
+ * @brief       Board specific configuration of direct mapped GPIOs
+ *
+ * @author      Bas Stottelaar <basstottelaar@gmail.com>
+ */
+
+#ifndef GPIO_PARAMS_H
+#define GPIO_PARAMS_H
+
+#include "board.h"
+#include "saul/periph.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief    GPIO pin configuration
+ */
+static const  saul_gpio_params_t saul_gpio_params[] =
+{
+    {
+        .name = "LED 0",
+        .pin = LED0_PIN,
+        .mode = GPIO_OUT
+    },
+    {
+        .name = "LED 1",
+        .pin = LED1_PIN,
+        .mode = GPIO_OUT
+    },
+    {
+        .name = "Button 1",
+        .pin = PB0_PIN,
+        .mode = GPIO_IN_PU,
+        .flags = SAUL_GPIO_INVERTED
+    },
+    {
+        .name = "Button 2",
+        .pin = PB1_PIN,
+        .mode = GPIO_IN_PU,
+        .flags = SAUL_GPIO_INVERTED
+    }
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* GPIO_PARAMS_H */
+/** @} */

boards/slstk3402a/include/periph_conf.h

+/*
+ * Copyright (C) 2015-2018 Freie Universität Berlin
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_slstk3402a
+ * @{
+ *
+ * @file
+ * @brief       Configuration of CPU peripherals for the SLSTK3402A starter kit
+ *
+ * @author      Hauke Petersen <hauke.petersen@fu-berlin.de>
+ * @author      Bas Stottelaar <basstottelaar@gmail.com>
+ */
+
+#ifndef PERIPH_CONF_H
+#define PERIPH_CONF_H
+
+#include "cpu.h"
+#include "periph_cpu.h"
+#include "em_cmu.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief   Internal macro to calculate *_NUMOF based on config.
+ */
+#define PERIPH_NUMOF(config)    (sizeof(config) / sizeof(config[0]))
+
+/**
+ * @name    Clock configuration
+ * @{
+ */
+#ifndef CLOCK_HF
+#define CLOCK_HF            cmuSelect_HFXO
+#endif
+#ifndef CLOCK_CORE_DIV
+#define CLOCK_CORE_DIV      cmuClkDiv_1
+#endif
+#ifndef CLOCK_LFA
+#define CLOCK_LFA           cmuSelect_LFXO
+#endif
+#ifndef CLOCK_LFB
+#define CLOCK_LFB           cmuSelect_LFXO
+#endif
+#ifndef CLOCK_LFE
+#define CLOCK_LFE           cmuSelect_LFXO
+#endif
+/** @} */
+
+/**
+ * @name    ADC configuration
+ * @{
+ */
+static const adc_conf_t adc_config[] = {
+    {
+        .dev = ADC0,
+        .cmu = cmuClock_ADC0,
+    }
+};
+
+static const adc_chan_conf_t adc_channel_config[] = {
+    {
+        .dev = 0,
+        .input = adcPosSelTEMP,
+        .reference = adcRef1V25,
+        .acq_time = adcAcqTime8
+    },
+    {
+        .dev = 0,
+        .input = adcPosSelAVDD,
+        .reference = adcRef5V,
+        .acq_time = adcAcqTime8
+    }
+};
+
+#define ADC_DEV_NUMOF       PERIPH_NUMOF(adc_config)
+#define ADC_NUMOF           PERIPH_NUMOF(adc_channel_config)
+/** @} */
+
+/**
+ * @name    I2C configuration
+ * @{
+ */
+static const i2c_conf_t i2c_config[] = {
+
+};
+
+#define I2C_NUMOF           PERIPH_NUMOF(i2c_config)
+#define I2C_0_ISR           isr_i2c0
+/** @} */
+
+/**
+ * @brief   RTC configuration
+ */
+#define RTC_NUMOF           (1U)
+
+/**
+ * @name    RTT configuration
+ * @{
+ */
+#define RTT_NUMOF           (1U)
+
+#define RTT_MAX_VALUE       (0xFFFFFFFF)
+#define RTT_FREQUENCY       (1U)
+/** @} */
+
+/**
+ * @name    SPI configuration
+ * @{
+ */
+static const spi_dev_t spi_config[] = {
+    {
+        .dev = USART2,
+        .mosi_pin = GPIO_PIN(PA, 6),
+        .miso_pin = GPIO_PIN(PA, 7),
+        .clk_pin = GPIO_PIN(PA, 8),
+        .loc = USART_ROUTELOC0_RXLOC_LOC1 |
+               USART_ROUTELOC0_TXLOC_LOC1 |
+               USART_ROUTELOC0_CLKLOC_LOC1,
+        .cmu = cmuClock_USART2,
+        .irq = USART2_RX_IRQn
+    }
+};
+
+#define SPI_NUMOF           PERIPH_NUMOF(spi_config)
+/** @} */
+
+/**
+ * @name    Timer configuration
+ *
+ * The implementation uses two timers in cascade mode.
+ * @{
+ */
+static const timer_conf_t timer_config[] = {
+    {
+        {
+            .dev = TIMER0,
+            .cmu = cmuClock_TIMER0
+        },
+        {
+            .dev = TIMER1,
+            .cmu = cmuClock_TIMER1
+        },
+        .irq = TIMER1_IRQn
+    }
+};
+
+#define TIMER_NUMOF         PERIPH_NUMOF(timer_config)
+#define TIMER_0_ISR         isr_timer1
+/** @} */
+
+/**
+ * @name    UART configuration
+ * @{
+ */
+static const uart_conf_t uart_config[] = {
+    {
+        .dev = USART0,
+        .rx_pin = GPIO_PIN(PA, 1),
+        .tx_pin = GPIO_PIN(PA, 0),
+        .loc = USART_ROUTELOC0_RXLOC_LOC0 |
+               USART_ROUTELOC0_TXLOC_LOC0,
+        .cmu = cmuClock_USART0,
+        .irq = USART0_RX_IRQn
+    },
+    {
+        .dev = LEUART0,
+        .rx_pin = GPIO_PIN(PD, 11),
+        .tx_pin = GPIO_PIN(PD, 10),
+        .loc = LEUART_ROUTELOC0_RXLOC_LOC18 |
+               LEUART_ROUTELOC0_TXLOC_LOC18,
+        .cmu = cmuClock_LEUART0,
+        .irq = LEUART0_IRQn
+    }
+};
+
+#define UART_NUMOF          PERIPH_NUMOF(uart_config)
+#define UART_0_ISR_RX       isr_usart0_rx
+#define UART_1_ISR_RX       isr_leuart0
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PERIPH_CONF_H */
+/** @} */

cpu/efm32/families/efm32pg12b/Makefile

+MODULE = cpu_efm32pg12b
+
+# (file triggers compiler bug. see #5775)
+SRC_NOLTO += vectors.c
+
+include $(RIOTBASE)/Makefile.base

cpu/efm32/families/efm32pg12b/cpus.txt

+# This file is automatically generated, and should not be changed. There is
+# probably little reason to edit this file anyway, since it should already
+# contain all information for the EFM32PG12B family of CPUs.
+
+# The intended usage is to grep for the exact model name, and split by spaces
+# to get the required information.
+
+# CPU - Family - Series - Architecture - Flash base - Flash size - SRAM base - SRAM size - Crypto? - TRNG? - Radio?
+efm32pg12b500f1024im48 efm32pg12b 1 cortex-m4f 0x00000000 0x00100000 0x20000000 0x00040000 1 1 0
+efm32pg12b500f1024il125 efm32pg12b 1 cortex-m4f 0x00000000 0x00100000 0x20000000 0x00040000 1 1 0
+efm32pg12b500f1024gl125 efm32pg12b 1 cortex-m4f 0x00000000 0x00100000 0x20000000 0x00040000 1 1 0
+efm32pg12b500f1024gm48 efm32pg12b 1 cortex-m4f 0x00000000 0x00100000 0x20000000 0x00040000 1 1 0

cpu/efm32/families/efm32pg12b/include/vendor/efm32pg12b_cryotimer.h

+/**************************************************************************//**
+ * @file efm32pg12b_cryotimer.h
+ * @brief EFM32PG12B_CRYOTIMER register and bit field definitions
+ * @version 5.4.0
+ ******************************************************************************
+ * # License
+ * <b>Copyright 2017 Silicon Laboratories, Inc. www.silabs.com</b>
+ ******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.@n
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.@n
+ * 3. This notice may not be removed or altered from any source distribution.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
+ * has no obligation to support this Software. Silicon Laboratories, Inc. is
+ * providing the Software "AS IS", with no express or implied warranties of any
+ * kind, including, but not limited to, any implied warranties of
+ * merchantability or fitness for any particular purpose or warranties against
+ * infringement of any proprietary rights of a third party.
+ *
+ * Silicon Laboratories, Inc. will not be liable for any consequential,
+ * incidental, or special damages, or any other relief, or for any claim by
+ * any third party, arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#if defined(__ICCARM__)
+#pragma system_include       /* Treat file as system include file. */
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+#pragma clang system_header  /* Treat file as system include file. */
+#endif
+
+/**************************************************************************//**
+* @addtogroup Parts
+* @{
+******************************************************************************/
+/**************************************************************************//**
+ * @defgroup EFM32PG12B_CRYOTIMER CRYOTIMER
+ * @{
+ * @brief EFM32PG12B_CRYOTIMER Register Declaration
+ *****************************************************************************/
+/** CRYOTIMER Register Declaration */
+typedef struct {
+  __IOM uint32_t CTRL;      /**< Control Register  */
+  __IOM uint32_t PERIODSEL; /**< Interrupt Duration  */
+  __IM uint32_t  CNT;       /**< Counter Value  */
+  __IOM uint32_t EM4WUEN;   /**< Wake Up Enable  */
+  __IM uint32_t  IF;        /**< Interrupt Flag Register  */
+  __IOM uint32_t IFS;       /**< Interrupt Flag Set Register  */
+  __IOM uint32_t IFC;       /**< Interrupt Flag Clear Register  */
+  __IOM uint32_t IEN;       /**< Interrupt Enable Register  */
+} CRYOTIMER_TypeDef;        /** @} */
+
+/**************************************************************************//**
+ * @addtogroup EFM32PG12B_CRYOTIMER
+ * @{
+ * @defgroup EFM32PG12B_CRYOTIMER_BitFields  CRYOTIMER Bit Fields
+ * @{
+ *****************************************************************************/
+
+/* Bit fields for CRYOTIMER CTRL */
+#define _CRYOTIMER_CTRL_RESETVALUE                0x00000000UL                            /**< Default value for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_MASK                      0x000000EFUL                            /**< Mask for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_EN                         (0x1UL << 0)                            /**< Enable CRYOTIMER */
+#define _CRYOTIMER_CTRL_EN_SHIFT                  0                                       /**< Shift value for CRYOTIMER_EN */
+#define _CRYOTIMER_CTRL_EN_MASK                   0x1UL                                   /**< Bit mask for CRYOTIMER_EN */
+#define _CRYOTIMER_CTRL_EN_DEFAULT                0x00000000UL                            /**< Mode DEFAULT for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_EN_DEFAULT                 (_CRYOTIMER_CTRL_EN_DEFAULT << 0)       /**< Shifted mode DEFAULT for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_DEBUGRUN                   (0x1UL << 1)                            /**< Debug Mode Run Enable */
+#define _CRYOTIMER_CTRL_DEBUGRUN_SHIFT            1                                       /**< Shift value for CRYOTIMER_DEBUGRUN */
+#define _CRYOTIMER_CTRL_DEBUGRUN_MASK             0x2UL                                   /**< Bit mask for CRYOTIMER_DEBUGRUN */
+#define _CRYOTIMER_CTRL_DEBUGRUN_DEFAULT          0x00000000UL                            /**< Mode DEFAULT for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_DEBUGRUN_DEFAULT           (_CRYOTIMER_CTRL_DEBUGRUN_DEFAULT << 1) /**< Shifted mode DEFAULT for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_OSCSEL_SHIFT              2                                       /**< Shift value for CRYOTIMER_OSCSEL */
+#define _CRYOTIMER_CTRL_OSCSEL_MASK               0xCUL                                   /**< Bit mask for CRYOTIMER_OSCSEL */
+#define _CRYOTIMER_CTRL_OSCSEL_DEFAULT            0x00000000UL                            /**< Mode DEFAULT for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_OSCSEL_DISABLED           0x00000000UL                            /**< Mode DISABLED for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_OSCSEL_LFRCO              0x00000001UL                            /**< Mode LFRCO for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_OSCSEL_LFXO               0x00000002UL                            /**< Mode LFXO for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_OSCSEL_ULFRCO             0x00000003UL                            /**< Mode ULFRCO for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_OSCSEL_DEFAULT             (_CRYOTIMER_CTRL_OSCSEL_DEFAULT << 2)   /**< Shifted mode DEFAULT for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_OSCSEL_DISABLED            (_CRYOTIMER_CTRL_OSCSEL_DISABLED << 2)  /**< Shifted mode DISABLED for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_OSCSEL_LFRCO               (_CRYOTIMER_CTRL_OSCSEL_LFRCO << 2)     /**< Shifted mode LFRCO for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_OSCSEL_LFXO                (_CRYOTIMER_CTRL_OSCSEL_LFXO << 2)      /**< Shifted mode LFXO for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_OSCSEL_ULFRCO              (_CRYOTIMER_CTRL_OSCSEL_ULFRCO << 2)    /**< Shifted mode ULFRCO for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_PRESC_SHIFT               5                                       /**< Shift value for CRYOTIMER_PRESC */
+#define _CRYOTIMER_CTRL_PRESC_MASK                0xE0UL                                  /**< Bit mask for CRYOTIMER_PRESC */
+#define _CRYOTIMER_CTRL_PRESC_DEFAULT             0x00000000UL                            /**< Mode DEFAULT for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_PRESC_DIV1                0x00000000UL                            /**< Mode DIV1 for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_PRESC_DIV2                0x00000001UL                            /**< Mode DIV2 for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_PRESC_DIV4                0x00000002UL                            /**< Mode DIV4 for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_PRESC_DIV8                0x00000003UL                            /**< Mode DIV8 for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_PRESC_DIV16               0x00000004UL                            /**< Mode DIV16 for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_PRESC_DIV32               0x00000005UL                            /**< Mode DIV32 for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_PRESC_DIV64               0x00000006UL                            /**< Mode DIV64 for CRYOTIMER_CTRL */
+#define _CRYOTIMER_CTRL_PRESC_DIV128              0x00000007UL                            /**< Mode DIV128 for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_PRESC_DEFAULT              (_CRYOTIMER_CTRL_PRESC_DEFAULT << 5)    /**< Shifted mode DEFAULT for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_PRESC_DIV1                 (_CRYOTIMER_CTRL_PRESC_DIV1 << 5)       /**< Shifted mode DIV1 for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_PRESC_DIV2                 (_CRYOTIMER_CTRL_PRESC_DIV2 << 5)       /**< Shifted mode DIV2 for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_PRESC_DIV4                 (_CRYOTIMER_CTRL_PRESC_DIV4 << 5)       /**< Shifted mode DIV4 for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_PRESC_DIV8                 (_CRYOTIMER_CTRL_PRESC_DIV8 << 5)       /**< Shifted mode DIV8 for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_PRESC_DIV16                (_CRYOTIMER_CTRL_PRESC_DIV16 << 5)      /**< Shifted mode DIV16 for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_PRESC_DIV32                (_CRYOTIMER_CTRL_PRESC_DIV32 << 5)      /**< Shifted mode DIV32 for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_PRESC_DIV64                (_CRYOTIMER_CTRL_PRESC_DIV64 << 5)      /**< Shifted mode DIV64 for CRYOTIMER_CTRL */
+#define CRYOTIMER_CTRL_PRESC_DIV128               (_CRYOTIMER_CTRL_PRESC_DIV128 << 5)     /**< Shifted mode DIV128 for CRYOTIMER_CTRL */
+
+/* Bit fields for CRYOTIMER PERIODSEL */
+#define _CRYOTIMER_PERIODSEL_RESETVALUE           0x00000020UL                                  /**< Default value for CRYOTIMER_PERIODSEL */
+#define _CRYOTIMER_PERIODSEL_MASK                 0x0000003FUL                                  /**< Mask for CRYOTIMER_PERIODSEL */
+#define _CRYOTIMER_PERIODSEL_PERIODSEL_SHIFT      0                                             /**< Shift value for CRYOTIMER_PERIODSEL */
+#define _CRYOTIMER_PERIODSEL_PERIODSEL_MASK       0x3FUL                                        /**< Bit mask for CRYOTIMER_PERIODSEL */
+#define _CRYOTIMER_PERIODSEL_PERIODSEL_DEFAULT    0x00000020UL                                  /**< Mode DEFAULT for CRYOTIMER_PERIODSEL */
+#define CRYOTIMER_PERIODSEL_PERIODSEL_DEFAULT     (_CRYOTIMER_PERIODSEL_PERIODSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for CRYOTIMER_PERIODSEL */
+
+/* Bit fields for CRYOTIMER CNT */
+#define _CRYOTIMER_CNT_RESETVALUE                 0x00000000UL                      /**< Default value for CRYOTIMER_CNT */
+#define _CRYOTIMER_CNT_MASK                       0xFFFFFFFFUL                      /**< Mask for CRYOTIMER_CNT */
+#define _CRYOTIMER_CNT_CNT_SHIFT                  0                                 /**< Shift value for CRYOTIMER_CNT */
+#define _CRYOTIMER_CNT_CNT_MASK                   0xFFFFFFFFUL                      /**< Bit mask for CRYOTIMER_CNT */
+#define _CRYOTIMER_CNT_CNT_DEFAULT                0x00000000UL                      /**< Mode DEFAULT for CRYOTIMER_CNT */
+#define CRYOTIMER_CNT_CNT_DEFAULT                 (_CRYOTIMER_CNT_CNT_DEFAULT << 0) /**< Shifted mode DEFAULT for CRYOTIMER_CNT */
+
+/* Bit fields for CRYOTIMER EM4WUEN */
+#define _CRYOTIMER_EM4WUEN_RESETVALUE             0x00000000UL                            /**< Default value for CRYOTIMER_EM4WUEN */
+#define _CRYOTIMER_EM4WUEN_MASK                   0x00000001UL                            /**< Mask for CRYOTIMER_EM4WUEN */
+#define CRYOTIMER_EM4WUEN_EM4WU                   (0x1UL << 0)                            /**< EM4 Wake-up Enable */
+#define _CRYOTIMER_EM4WUEN_EM4WU_SHIFT            0                                       /**< Shift value for CRYOTIMER_EM4WU */
+#define _CRYOTIMER_EM4WUEN_EM4WU_MASK             0x1UL                                   /**< Bit mask for CRYOTIMER_EM4WU */
+#define _CRYOTIMER_EM4WUEN_EM4WU_DEFAULT          0x00000000UL                            /**< Mode DEFAULT for CRYOTIMER_EM4WUEN */
+#define CRYOTIMER_EM4WUEN_EM4WU_DEFAULT           (_CRYOTIMER_EM4WUEN_EM4WU_DEFAULT << 0) /**< Shifted mode DEFAULT for CRYOTIMER_EM4WUEN */
+
+/* Bit fields for CRYOTIMER IF */
+#define _CRYOTIMER_IF_RESETVALUE                  0x00000000UL                        /**< Default value for CRYOTIMER_IF */
+#define _CRYOTIMER_IF_MASK                        0x00000001UL                        /**< Mask for CRYOTIMER_IF */
+#define CRYOTIMER_IF_PERIOD                       (0x1UL << 0)                        /**< Wakeup Event/Interrupt */
+#define _CRYOTIMER_IF_PERIOD_SHIFT                0                                   /**< Shift value for CRYOTIMER_PERIOD */
+#define _CRYOTIMER_IF_PERIOD_MASK                 0x1UL                               /**< Bit mask for CRYOTIMER_PERIOD */
+#define _CRYOTIMER_IF_PERIOD_DEFAULT              0x00000000UL                        /**< Mode DEFAULT for CRYOTIMER_IF */
+#define CRYOTIMER_IF_PERIOD_DEFAULT               (_CRYOTIMER_IF_PERIOD_DEFAULT << 0) /**< Shifted mode DEFAULT for CRYOTIMER_IF */
+
+/* Bit fields for CRYOTIMER IFS */
+#define _CRYOTIMER_IFS_RESETVALUE                 0x00000000UL                         /**< Default value for CRYOTIMER_IFS */
+#define _CRYOTIMER_IFS_MASK                       0x00000001UL                         /**< Mask for CRYOTIMER_IFS */
+#define CRYOTIMER_IFS_PERIOD                      (0x1UL << 0)                         /**< Set PERIOD Interrupt Flag */
+#define _CRYOTIMER_IFS_PERIOD_SHIFT               0                                    /**< Shift value for CRYOTIMER_PERIOD */
+#define _CRYOTIMER_IFS_PERIOD_MASK                0x1UL                                /**< Bit mask for CRYOTIMER_PERIOD */
+#define _CRYOTIMER_IFS_PERIOD_DEFAULT             0x00000000UL                         /**< Mode DEFAULT for CRYOTIMER_IFS */
+#define CRYOTIMER_IFS_PERIOD_DEFAULT              (_CRYOTIMER_IFS_PERIOD_DEFAULT << 0) /**< Shifted mode DEFAULT for CRYOTIMER_IFS */
+
+/* Bit fields for CRYOTIMER IFC */
+#define _CRYOTIMER_IFC_RESETVALUE                 0x00000000UL                         /**< Default value for CRYOTIMER_IFC */
+#define _CRYOTIMER_IFC_MASK                       0x00000001UL                         /**< Mask for CRYOTIMER_IFC */
+#define CRYOTIMER_IFC_PERIOD                      (0x1UL << 0)                         /**< Clear PERIOD Interrupt Flag */
+#define _CRYOTIMER_IFC_PERIOD_SHIFT               0                                    /**< Shift value for CRYOTIMER_PERIOD */
+#define _CRYOTIMER_IFC_PERIOD_MASK                0x1UL                                /**< Bit mask for CRYOTIMER_PERIOD */
+#define _CRYOTIMER_IFC_PERIOD_DEFAULT             0x00000000UL                         /**< Mode DEFAULT for CRYOTIMER_IFC */
+#define CRYOTIMER_IFC_PERIOD_DEFAULT              (_CRYOTIMER_IFC_PERIOD_DEFAULT << 0) /**< Shifted mode DEFAULT for CRYOTIMER_IFC */
+
+/* Bit fields for CRYOTIMER IEN */
+#define _CRYOTIMER_IEN_RESETVALUE                 0x00000000UL                         /**< Default value for CRYOTIMER_IEN */
+#define _CRYOTIMER_IEN_MASK                       0x00000001UL                         /**< Mask for CRYOTIMER_IEN */
+#define CRYOTIMER_IEN_PERIOD                      (0x1UL << 0)                         /**< PERIOD Interrupt Enable */
+#define _CRYOTIMER_IEN_PERIOD_SHIFT               0                                    /**< Shift value for CRYOTIMER_PERIOD */
+#define _CRYOTIMER_IEN_PERIOD_MASK                0x1UL                                /**< Bit mask for CRYOTIMER_PERIOD */
+#define _CRYOTIMER_IEN_PERIOD_DEFAULT             0x00000000UL                         /**< Mode DEFAULT for CRYOTIMER_IEN */
+#define CRYOTIMER_IEN_PERIOD_DEFAULT              (_CRYOTIMER_IEN_PERIOD_DEFAULT << 0) /**< Shifted mode DEFAULT for CRYOTIMER_IEN */
+
+/** @} */
+/** @} End of group EFM32PG12B_CRYOTIMER */
+/** @} End of group Parts */
+#ifdef __cplusplus
+}
+#endif
+