Merge pull request #10008 from haukepetersen/fix_gpioirq_stm32f1

cpu/stm32f1/gpio: use gpio_irq feature

cpu/stm32f1/periph/gpio.c

@@ -29,21 +29,23 @@
 #define ENABLE_DEBUG (0)
 #include "debug.h"
 
-/**
- * @brief   Number of available external interrupt lines
- */
-#define GPIO_ISR_CHAN_NUMOF             (16U)
-
 /**
  * @brief   Extract information from mode parameter
  */
 #define MODE_MASK                       (0x0f)
 #define ODR_POS                         (4U)
 
+#ifdef MODULE_PERIPH_GPIO_IRQ
+/**
+ * @brief   Number of available external interrupt lines
+ */
+#define GPIO_ISR_CHAN_NUMOF             (16U)
+
 /**
  * @brief   Allocate memory for one callback and argument per EXTI channel
  */
 static gpio_isr_ctx_t exti_ctx[GPIO_ISR_CHAN_NUMOF];
+#endif
 
 /**
  * @brief   Extract the pin's port base address from the given pin identifier
@@ -99,45 +101,6 @@ int gpio_init(gpio_t pin, gpio_mode_t mode)
     return 0; /* all OK */
 }
 
-int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
-                  gpio_cb_t cb, void *arg)
-{
-    int pin_num = _pin_num(pin);
-
-    /* disable interrupts on the channel we want to edit (just in case) */
-    EXTI->IMR &= ~(1 << pin_num);
-    /* configure pin as input */
-    gpio_init(pin, mode);
-    /* set callback */
-    exti_ctx[pin_num].cb = cb;
-    exti_ctx[pin_num].arg = arg;
-    /* enable alternate function clock for the GPIO module */
-    periph_clk_en(APB2, RCC_APB2ENR_AFIOEN);
-    /* configure the EXTI channel */
-    AFIO->EXTICR[pin_num >> 2] &= ~(0xf << ((pin_num & 0x3) * 4));
-    AFIO->EXTICR[pin_num >> 2] |=  (_port_num(pin) << ((pin_num & 0x3) * 4));
-    /* configure the active flank */
-    EXTI->RTSR &= ~(1 << pin_num);
-    EXTI->RTSR |=  ((flank & 0x1) << pin_num);
-    EXTI->FTSR &= ~(1 << pin_num);
-    EXTI->FTSR |=  ((flank >> 1) << pin_num);
-    /* active global interrupt for the selected port */
-    if (pin_num < 5) {
-        NVIC_EnableIRQ(EXTI0_IRQn + pin_num);
-    }
-    else if (pin_num < 10) {
-        NVIC_EnableIRQ(EXTI9_5_IRQn);
-    }
-    else {
-        NVIC_EnableIRQ(EXTI15_10_IRQn);
-    }
-    /* clear event mask */
-    EXTI->EMR &= ~(1 << pin_num);
-    /* unmask the pins interrupt channel */
-    EXTI->IMR |= (1 << pin_num);
-    return 0;
-}
-
 void gpio_init_af(gpio_t pin, gpio_af_t af)
 {
     int pin_num = _pin_num(pin);
@@ -160,16 +123,6 @@ void gpio_init_analog(gpio_t pin)
     _port(pin)->CR[pin_num >= 8] &= ~(0xfl << (4 * (pin_num - ((pin_num >= 8) * 8))));
 }
 
-void gpio_irq_enable(gpio_t pin)
-{
-    EXTI->IMR |= (1 << _pin_num(pin));
-}
-
-void gpio_irq_disable(gpio_t pin)
-{
-    EXTI->IMR &= ~(1 << _pin_num(pin));
-}
-
 int gpio_read(gpio_t pin)
 {
     GPIO_TypeDef *port = _port(pin);
@@ -215,6 +168,56 @@ void gpio_write(gpio_t pin, int value)
     }
 }
 
+#ifdef MODULE_PERIPH_GPIO_IRQ
+int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
+                  gpio_cb_t cb, void *arg)
+{
+    int pin_num = _pin_num(pin);
+
+    /* disable interrupts on the channel we want to edit (just in case) */
+    EXTI->IMR &= ~(1 << pin_num);
+    /* configure pin as input */
+    gpio_init(pin, mode);
+    /* set callback */
+    exti_ctx[pin_num].cb = cb;
+    exti_ctx[pin_num].arg = arg;
+    /* enable alternate function clock for the GPIO module */
+    periph_clk_en(APB2, RCC_APB2ENR_AFIOEN);
+    /* configure the EXTI channel */
+    AFIO->EXTICR[pin_num >> 2] &= ~(0xf << ((pin_num & 0x3) * 4));
+    AFIO->EXTICR[pin_num >> 2] |=  (_port_num(pin) << ((pin_num & 0x3) * 4));
+    /* configure the active flank */
+    EXTI->RTSR &= ~(1 << pin_num);
+    EXTI->RTSR |=  ((flank & 0x1) << pin_num);
+    EXTI->FTSR &= ~(1 << pin_num);
+    EXTI->FTSR |=  ((flank >> 1) << pin_num);
+    /* active global interrupt for the selected port */
+    if (pin_num < 5) {
+        NVIC_EnableIRQ(EXTI0_IRQn + pin_num);
+    }
+    else if (pin_num < 10) {
+        NVIC_EnableIRQ(EXTI9_5_IRQn);
+    }
+    else {
+        NVIC_EnableIRQ(EXTI15_10_IRQn);
+    }
+    /* clear event mask */
+    EXTI->EMR &= ~(1 << pin_num);
+    /* unmask the pins interrupt channel */
+    EXTI->IMR |= (1 << pin_num);
+    return 0;
+}
+
+void gpio_irq_enable(gpio_t pin)
+{
+    EXTI->IMR |= (1 << _pin_num(pin));
+}
+
+void gpio_irq_disable(gpio_t pin)
+{
+    EXTI->IMR &= ~(1 << _pin_num(pin));
+}
+
 void isr_exti(void)
 {
     /* only generate interrupts against lines which have their IMR set */
@@ -227,3 +230,4 @@ void isr_exti(void)
     }
     cortexm_isr_end();
 }
+#endif