cpu/kinetis: adapted GPIO driver

cpu/kinetis_common/include/periph_cpu.h

@@ -50,6 +50,32 @@ typedef uint16_t gpio_t;
  */
 #define CPUID_LEN           (16U)
 
+/**
+ * @brief   Generate GPIO mode bitfields
+ *
+ * We use the following bits to encode the pin mode:
+ * - bit 0: 0 for pull-down or 1 for pull-up
+ * - bit 1: pull register enable (as configured in bit 0)
+ * - bit 5: OD enable
+ * - bit 7: output or input mode
+ */
+#define GPIO_MODE(pu, pe, od, out)   (pu | (pe << 1) | (od << 5) | (out << 7))
+
+/**
+ * @brief   Override GPIO modes
+ * @{
+ */
+#define HAVE_GPIO_MODE_T
+typedef enum {
+    GPIO_IN    = GPIO_MODE(0, 0, 0, 0),     /**< IN */
+    GPIO_IN_PD = GPIO_MODE(0, 1, 0, 0),     /**< IN with pull-down */
+    GPIO_IN_PU = GPIO_MODE(1, 1, 0, 0),     /**< IN with pull-up */
+    GPIO_OUT   = GPIO_MODE(0, 0, 0, 1),     /**< OUT (push-pull) */
+    GPIO_OD    = GPIO_MODE(1, 0, 1, 1),     /**< OD */
+    GPIO_OD_PU = GPIO_MODE(1, 1, 1, 1),     /**< OD with pull-up */
+} gpio_mode_t;
+/** @} */
+
 /**
  * @brief   Define a condensed set of PORT PCR values
  *
@@ -69,18 +95,6 @@ enum {
     GPIO_PCR_PU    = (PORT_PCR_PE_MASK | PORT_PCR_PS_MASK)  /**< enable PU */
 };
 
-/**
- * @brief   Override values for pull register configuration
- * @{
- */
-#define HAVE_GPIO_PP_T
-typedef enum {
-    GPIO_NOPULL   = 0x0,            /**< do not use internal pull resistors */
-    GPIO_PULLUP   = GPIO_PCR_PU,    /**< enable internal pull-up resistor */
-    GPIO_PULLDOWN = GPIO_PCR_PD     /**< enable internal pull-down resistor */
-} gpio_pp_t;
-/** @} */
-
 /**
  * @brief   Override flank configuration values
  * @{

cpu/kinetis_common/periph/gpio.c

@@ -29,6 +29,16 @@
 #include "cpu.h"
 #include "periph/gpio.h"
 
+/**
+ * @brief   Get the OCR reg value from the gpio_mode_t value
+ */
+#define MODE_PCR_MASK       (PORT_PCR_ODE_MASK | PORT_PCR_PE_MASK | PORT_PCR_PS_MASK)
+
+/**
+ * @brief   This bit in the mode is set to 1 for output configuration
+ */
+#define MODE_OUT            (0x80)
+
 /**
  * @brief   Shifting a gpio_t value by this number of bit we can extract the
  *          port number from the GPIO base address
@@ -161,24 +171,29 @@ static void ctx_clear(int port, int pin)
     write_map(port, pin, ctx);
 }
 
-int gpio_init(gpio_t pin, gpio_dir_t dir, gpio_pp_t pullup)
+int gpio_init(gpio_t pin, gpio_mode_t mode)
 {
     /* set pin to analog mode while configuring it */
     gpio_init_port(pin, GPIO_AF_ANALOG);
+
     /* set pin direction */
-    gpio(pin)->PDDR &= ~(1 << pin_num(pin));
-    gpio(pin)->PDDR |=  (dir << pin_num(pin));
-    if (dir == GPIO_DIR_OUT) {
+    if (mode & MODE_OUT) {
+        gpio(pin)->PDDR |=  (1 << pin_num(pin));
         gpio(pin)->PCOR = (1 << pin_num(pin));
     }
+    else {
+        gpio(pin)->PDDR &= ~(1 << pin_num(pin));
+    }
+
     /* enable GPIO function */
-    port(pin)->PCR[pin_num(pin)] = (GPIO_AF_GPIO | pullup);
+    port(pin)->PCR[pin_num(pin)] = (GPIO_AF_GPIO | (mode & MODE_PCR_MASK));
     return 0;
 }
 
-int gpio_init_int(gpio_t pin, gpio_pp_t pullup, gpio_flank_t flank, gpio_cb_t cb, void *arg)
+int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
+                  gpio_cb_t cb, void *arg)
 {
-    if (gpio_init(pin, GPIO_DIR_IN, pullup) < 0) {
+    if (gpio_init(pin, mode) < 0) {
         return -1;
     }