drivers/periph&cpu: add and use common periph_init()

cpu/atmega1281/cpu.c

@@ -18,12 +18,13 @@
  */
 
 #include "cpu.h"
+#include "periph/init.h"
 
 /**
  * @brief Initialize the CPU, set IRQ priorities
  */
 void cpu_init(void)
 {
-    /* Right now we need to do nothing here */
-    ;
+    /* trigger static peripheral initialization */
+    periph_init();
 }

cpu/atmega2560/cpu.c

@@ -18,12 +18,13 @@
  */
 
 #include "cpu.h"
+#include "periph/init.h"
 
 /**
  * @brief Initialize the CPU, set IRQ priorities
  */
 void cpu_init(void)
 {
-    /* Right now we need to do nothing here */
-    ;
+    /* trigger static peripheral initialization */
+    periph_init();
 }

cpu/atmega328p/cpu.c

@@ -18,12 +18,13 @@
  */
 
 #include "cpu.h"
+#include "periph/init.h"
 
 /**
  * @brief Initialize the CPU, set IRQ priorities
  */
 void cpu_init(void)
 {
-    /* Right now we need to do nothing here */
-    ;
+    /* trigger static peripheral initialization */
+    periph_init();
 }

cpu/cc2538/cpu.c

@@ -20,6 +20,7 @@
 #include <assert.h>
 
 #include "cpu.h"
+#include "periph/init.h"
 
 #define BIT(n)          ( 1UL << (n) )
 
@@ -47,6 +48,8 @@ void cpu_init(void)
     SYS_CTRL->I_MAP = 1;
     /* initialize the clock system */
     cpu_clock_init();
+    /* trigger static peripheral initialization */
+    periph_init();
 }
 
 /**

cpu/cc26x0/cpu.c

@@ -17,8 +17,9 @@
  * @}
  */
 
- #include "cpu.h"
- #include "periph_conf.h"
+#include "cpu.h"
+#include "periph_conf.h"
+#include "periph/init.h"
 
 #ifndef HF_CLOCK_SOURCE
 #define HF_CLOCK_SOURCE DDI_0_OSC_CTL0_SCLK_HF_SRC_SEL_RCOSC /* set 48MHz RCOSC */
@@ -42,6 +43,9 @@ void cpu_init(void)
 
     /* initialize the system clock */
     cpu_clock_init();
+
+    /* trigger static peripheral initialization */
+    periph_init();
 }
 
 static void cpu_clock_init(void)

cpu/ezr32wg/cpu.c

@@ -19,6 +19,7 @@
 
 #include "cpu.h"
 #include "periph_conf.h"
+#include "periph/init.h"
 
 /**
  * @brief   Configure clock sources and the CPU frequency
@@ -59,4 +60,6 @@ void cpu_init(void)
     cortexm_init();
     /* Initialise clock sources and generic clocks */
     clk_init();
+    /* trigger static peripheral initialization */
+    periph_init();
 }

cpu/k60/cpu.c

@@ -9,6 +9,7 @@
 #include <stdint.h>
 #include "cpu.h"
 #include "board.h"
+#include "periph/init.h"
 
 /**
  * @ingroup     cpu_k60
@@ -48,6 +49,8 @@ void cpu_init(void)
     cortexm_init();
     /* Check that we are running on the CPU that this code was built for */
     check_running_cpu_revision();
+    /* trigger static peripheral initialization */
+    periph_init();
 }
 
 static void check_running_cpu_revision(void)

cpu/k64f/cpu.c

@@ -23,6 +23,7 @@
 #include "cpu.h"
 #include "mcg.h"
 #include "cpu_conf.h"
+#include "periph/init.h"
 
 #define SIM_CLKDIV1_60MHZ      (SIM_CLKDIV1_OUTDIV1(0) | \
                                 SIM_CLKDIV1_OUTDIV2(0) | \
@@ -40,6 +41,8 @@ void cpu_init(void)
     cortexm_init();
     /* initialize the clock system */
     cpu_clock_init();
+    /* trigger static peripheral initialization */
+    periph_init();
 }
 
 /**

cpu/kw2x/cpu.c

@@ -23,6 +23,7 @@
 #include "cpu.h"
 #include "mcg.h"
 #include "cpu_conf.h"
+#include "periph/init.h"
 
 #define FLASH_BASE          (0x00000000)
 
@@ -37,6 +38,8 @@ void cpu_init(void)
     cortexm_init();
     /* initialize the clock system */
     cpu_clock_init();
+    /* trigger static peripheral initialization */
+    periph_init();
 }
 
 static inline void modem_clock_init(void)

cpu/lm4f120/cpu.c

@@ -23,6 +23,7 @@
 #include "thread.h"
 #include "arch/thread_arch.h"
 #include "arch/irq_arch.h"
+#include "periph/init.h"
 
 /**
  * @brief Initialize the CPU, set IRQ priorities
@@ -34,6 +35,9 @@ void cpu_init(void)
 
     /* initialize the clock system */
     cpu_clock_init(CLOCK_SOURCE);
+
+    /* trigger static peripheral initialization */
+    periph_init();
 }
 
 void setup_fpu(void)

cpu/lpc11u34/cpu.c

@@ -18,6 +18,7 @@
  */
 
 #include "cpu.h"
+#include "periph/init.h"
 
 
 #define SYSOSCCTRL_Val    0x00000000 /* Reset: 0x000 */
@@ -111,4 +112,6 @@ void cpu_init(void)
     cortexm_init();
     /* initialize the clock */
     clk_init();
+    /* trigger static peripheral initialization */
+    periph_init();
 }

cpu/lpc1768/cpu.c

@@ -18,6 +18,7 @@
  */
 
 #include "cpu.h"
+#include "periph/init.h"
 
 /**
  * @brief Initialize the CPU, set IRQ priorities
@@ -26,4 +27,6 @@ void cpu_init(void)
 {
     /* initialize the Cortex-M core */
     cortexm_init();
+    /* trigger static peripheral initialization */
+    periph_init();
 }

cpu/nrf51/cpu.c

@@ -19,6 +19,7 @@
 
 #include "cpu.h"
 #include "periph_conf.h"
+#include "periph/init.h"
 
 /**
  * @brief Initialize the CPU, set IRQ priorities
@@ -39,4 +40,6 @@ void cpu_init(void)
     NRF_CLOCK->TASKS_HFCLKSTART = 1;
     while (NRF_CLOCK->EVENTS_HFCLKSTARTED == 0) {}
 #endif
+    /* trigger static peripheral initialization */
+    periph_init();
 }

cpu/nrf52/cpu.c

@@ -24,6 +24,7 @@
 
 #include "cpu.h"
 #include "periph_conf.h"
+#include "periph/init.h"
 
 /* FTPAN helper functions */
 static bool ftpan_32(void);
@@ -82,6 +83,9 @@ void cpu_init(void)
     NVIC_EnableIRQ(SWI0_EGU0_IRQn);
     NVIC_SetPriority(SWI0_EGU0_IRQn, 6);
 #endif
+
+    /* trigger static peripheral initialization */
+    periph_init();
 }
 
 /**

cpu/sam3/cpu.c

@@ -19,6 +19,7 @@
 
 #include "cpu.h"
 #include "periph_conf.h"
+#include "periph/init.h"
 
 /**
  * @brief   Keys needed for editing certain PMC registers
@@ -88,4 +89,7 @@ void cpu_init(void)
     PMC->PMC_MCKR = PMC_MCKR_CSS_PLLA_CLK;
     /* wait for master clock to be ready */
     while (!(PMC->PMC_SR & PMC_SR_MCKRDY));
+
+    /* trigger static peripheral initialization */
+    periph_init();
 }

cpu/samd21/cpu.c

@@ -20,6 +20,7 @@
 
 #include "cpu.h"
 #include "periph_conf.h"
+#include "periph/init.h"
 
 /**
  * @brief   Configure clock sources and the cpu frequency

cpu/saml21/cpu.c

@@ -19,6 +19,7 @@
  */
 
 #include "cpu.h"
+#include "periph/init.h"
 
 static void _gclk_setup(int gclk, uint32_t reg)
 {
@@ -77,4 +78,7 @@ void cpu_init(void)
      */
     SUPC->BOD33.bit.ENABLE=0;
 #endif
+
+    /* trigger static peripheral initialization */
+    periph_init();
 }

cpu/stm32f0/cpu.c

@@ -19,6 +19,7 @@
 
 #include "cpu.h"
 #include "periph_conf.h"
+#include "periph/init.h"
 
 /* Check the source to be used for the PLL */
 #if defined(CLOCK_HSI) && defined(CLOCK_HSE)
@@ -54,6 +55,8 @@ void cpu_init(void)
     cortexm_init();
     /* initialize the clock system */
     clock_init();
+    /* trigger static peripheral initialization */
+    periph_init();
 }
 
 /**

cpu/stm32f1/cpu.c

@@ -27,6 +27,7 @@
 
 #include "cpu.h"
 #include "periph_conf.h"
+#include "periph/init.h"
 
 /* Configuration of flash access cycles */
 #if CLOCK_CORECLOCK <= 24000000
@@ -103,6 +104,8 @@ void cpu_init(void)
     cortexm_init();
     /* initialize system clocks */
     clk_init();
+    /* trigger static peripheral initialization */
+    periph_init();
 }
 
 /**

cpu/stm32f2/cpu.c

@@ -19,6 +19,7 @@
 
 #include "cpu.h"
 #include "periph_conf.h"
+#include "periph/init.h"
 
 #ifdef HSI_VALUE
 # define RCC_CR_SOURCE          RCC_CR_HSION
@@ -38,6 +39,8 @@ void cpu_init(void)
     cortexm_init();
     /* initialize system clocks */
     clk_init();
+    /* trigger static peripheral initialization */
+    periph_init();
 }
 
 /**