Skip to content
Snippets Groups Projects
Commit 531e6f50 authored by Dan Evans's avatar Dan Evans
Browse files

sam0:usart - wake from sleep on receive line

parent 2681ec16
No related branches found
No related tags found
No related merge requests found
Hide whitespace changes
Inline Side-by-side
Showing
with 33 additions and 18 deletions
boards/arduino-mkr-common/include/periph_conf.h
+ 1
− 1
View file @ 531e6f50
......@@ -110,7 +110,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_D,
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_2,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
}
};
......
boards/arduino-zero/include/periph_conf.h
+ 2
− 2
View file @ 531e6f50
......@@ -113,7 +113,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_D,
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_2,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
},
{
......@@ -123,7 +123,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_C,
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_2,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
}
};
......
boards/samd21-xpro/include/periph_conf.h
+ 3
− 3
View file @ 531e6f50
......@@ -118,7 +118,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_C,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
},
{ /* EXT1 */
......@@ -128,7 +128,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_D,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
},
{ /* EXT2/3 */
......@@ -138,7 +138,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_D,
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_2,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
}
};
......
boards/saml21-xpro/include/periph_conf.h
+ 2
− 2
View file @ 531e6f50
......@@ -60,7 +60,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_C,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0
},
{ /* EXT1 header */
......@@ -70,7 +70,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_D,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0
}
};
......
boards/samr21-xpro/include/periph_conf.h
+ 2
− 2
View file @ 531e6f50
......@@ -118,7 +118,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_D,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
},
{
......@@ -128,7 +128,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_D,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
}
};
......
boards/sodaq-autonomo/include/periph_conf.h
+ 4
− 4
View file @ 531e6f50
......@@ -109,7 +109,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_C,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_2,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
},
{
......@@ -119,7 +119,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_D,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0_RTS_2_CTS_3,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
},
{
......@@ -129,7 +129,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_C,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_2,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
},
{
......@@ -139,7 +139,7 @@ static const uart_conf_t uart_config[] = {
.mux = GPIO_MUX_C,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_2,
.runstdby = 0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
}
};
......
cpu/sam0_common/include/periph_cpu_common.h
+ 10
− 1
View file @ 531e6f50
......@@ -117,6 +117,15 @@ typedef enum {
* and CTS on pad 3 */
} uart_txpad_t;
/**
* @brief Available SERCOM UART flag selections
*/
typedef enum {
UART_FLAG_NONE = 0x0, /**< No flags set */
UART_FLAG_RUN_STANDBY = 0x1, /**< run SERCOM in standby mode */
UART_FLAG_WAKEUP = 0x2, /**< wake from sleep on receive */
} uart_flag_t;
/**
* @brief UART device configuration
*/
......@@ -127,7 +136,7 @@ typedef struct {
gpio_mux_t mux; /**< alternative function for pins */
uart_rxpad_t rx_pad; /**< pad selection for RX line */
uart_txpad_t tx_pad; /**< pad selection for TX line */
uint8_t runstdby; /**< allow SERCOM to run in standby mode */
uart_flag_t flags; /**< set optional SERCOM flags */
uint32_t gclk_src; /**< GCLK source which supplys SERCOM */
} uart_conf_t;
......
cpu/sam0_common/periph/uart.c
+ 9
− 3
View file @ 531e6f50
......@@ -80,9 +80,11 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
SERCOM_USART_CTRLA_SAMPR(0x1) |
SERCOM_USART_CTRLA_TXPO(uart_config[uart].tx_pad) |
SERCOM_USART_CTRLA_RXPO(uart_config[uart].rx_pad) |
SERCOM_USART_CTRLA_MODE(0x1) |
(uart_config[uart].runstdby ?
SERCOM_USART_CTRLA_RUNSTDBY : 0));
SERCOM_USART_CTRLA_MODE(0x1));
/* Set run in standby mode if enabled */
if (uart_config[uart].flags & UART_FLAG_RUN_STANDBY) {
dev(uart)->CTRLA.reg |= SERCOM_USART_CTRLA_RUNSTDBY;
}
/* calculate and set baudrate */
uint32_t baud = ((((uint32_t)CLOCK_CORECLOCK * 10) / baudrate) / 16);
......@@ -98,6 +100,10 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
NVIC_EnableIRQ(SERCOM0_IRQn + sercom_id(dev(uart)));
dev(uart)->CTRLB.reg |= SERCOM_USART_CTRLB_RXEN;
dev(uart)->INTENSET.reg |= SERCOM_USART_INTENSET_RXC;
/* set wakeup receive from sleep if enabled */
if (uart_config[uart].flags & UART_FLAG_WAKEUP) {
dev(uart)->CTRLB.reg |= SERCOM_USART_CTRLB_SFDE;
}
}
while (dev(uart)->SYNCBUSY.reg & SERCOM_USART_SYNCBUSY_CTRLB) {}
......
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment