cpu: stm32l1: use periph_common SPI functions

cpu/stm32l1/Makefile.include

@@ -3,4 +3,7 @@ export CPU_ARCH = cortex-m3
 # use hwtimer compatibility module
 USEMODULE += hwtimer_compat
 
+# use common periph functions
+USEMODULE += periph_common
+
 include $(RIOTCPU)/Makefile.include.cortexm_common

cpu/stm32l1/include/periph_cpu.h

@@ -81,6 +81,15 @@ typedef enum {
     GPIO_AF14               /**< use alternate function 14 */
 } gpio_af_t;
 
+/**
+ * @brief declare needed generic SPI functions
+ * @{
+ */
+#define PERIPH_SPI_NEEDS_TRANSFER_BYTES
+#define PERIPH_SPI_NEEDS_TRANSFER_REG
+#define PERIPH_SPI_NEEDS_TRANSFER_REGS
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif

cpu/stm32l1/periph/spi.c

@@ -218,38 +218,6 @@ int spi_transfer_byte(spi_t dev, char out, char *in)
     return 1;
 }
 
-int spi_transfer_bytes(spi_t dev, char *out, char *in, unsigned int length)
-{
-    char res;
-    int count = 0;
-
-    for (int i = 0; i < length; i++) {
-        if (out) {
-            count += spi_transfer_byte(dev, out[i], &res);
-        }
-        else {
-            count += spi_transfer_byte(dev, 0, &res);
-        }
-        if (in) {
-            in[i] = res;
-        }
-    }
-
-    return count;
-}
-
-int spi_transfer_reg(spi_t dev, uint8_t reg, char out, char *in)
-{
-    spi_transfer_byte(dev, reg, 0);
-    return spi_transfer_byte(dev, out, in);
-}
-
-int spi_transfer_regs(spi_t dev, uint8_t reg, char *out, char *in, unsigned int length)
-{
-    spi_transfer_byte(dev, reg, 0);
-    return spi_transfer_bytes(dev, out, in, length);
-}
-
 void spi_transmission_begin(spi_t dev, char reset_val)
 {
     /* slave mode is not (yet) supported */