boards/nucleo-f401: add qdec

Use TIM3 (PA6 and PA7 pins) and TIM4 (PB6 and PB7 pins) timers.

Signed-off-by: Gilles DOFFE <g.doffe@gmail.com>

boards/nucleo-f401/Makefile.features

@@ -7,6 +7,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_qdec
 
 # load the common Makefile.features for Nucleo boards
 include $(RIOTBOARD)/common/nucleo64/Makefile.features

boards/nucleo-f401/include/periph_conf.h

@@ -135,19 +135,42 @@ static const pwm_conf_t pwm_config[] = {
         .af       = GPIO_AF1,
         .bus      = APB1
     },
+};
+
+#define PWM_NUMOF           (sizeof(pwm_config) / sizeof(pwm_config[0]))
+/** @} */
+
+/**
+ * @name    QDEC configuration
+ * @{
+ */
+static const qdec_conf_t qdec_config[] = {
     {
         .dev      = TIM3,
+        .max      = 0xffffffff,
         .rcc_mask = RCC_APB1ENR_TIM3EN,
-        .chan     = { { .pin = GPIO_PIN(PORT_B, 4) /* D5 */, .cc_chan = 0 },
-                      { .pin = GPIO_PIN(PORT_C, 7) /* D9 */, .cc_chan = 1 },
-                      { .pin = GPIO_PIN(PORT_C, 8),          .cc_chan = 2 },
-                      { .pin = GPIO_PIN(PORT_C, 9),          .cc_chan = 3 } },
+        .chan     = { { .pin = GPIO_PIN(PORT_A, 6),             .cc_chan = 0 },
+                      { .pin = GPIO_PIN(PORT_A, 7),             .cc_chan = 1 } },
         .af       = GPIO_AF2,
-        .bus      = APB1
+        .bus      = APB1,
+        .irqn     = TIM3_IRQn
+    },
+    {
+        .dev      = TIM4,
+        .max      = 0xffffffff,
+        .rcc_mask = RCC_APB1ENR_TIM4EN,
+        .chan     = { { .pin = GPIO_PIN(PORT_B, 6),             .cc_chan = 0 },
+                      { .pin = GPIO_PIN(PORT_B, 7),             .cc_chan = 1 } },
+        .af       = GPIO_AF2,
+        .bus      = APB1,
+        .irqn     = TIM4_IRQn
     },
 };
 
-#define PWM_NUMOF           (sizeof(pwm_config) / sizeof(pwm_config[0]))
+#define QDEC_0_ISR         isr_tim3
+#define QDEC_1_ISR         isr_tim4
+
+#define QDEC_NUMOF           (sizeof(qdec_config) / sizeof(qdec_config[0]))
 /** @} */
 
 /**