board/nucleo-f446: add qdec

TIM3 now use for QDEC instead of PWM,
TIM3 (PA6 & PA7 pins) and TIM4 (PB6 & PB7 pins) timers,

Signed-off-by: Yannick Gicquel <ygicquel@gmail.com>

boards/nucleo-f446/Makefile.features

@@ -7,6 +7,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_qdec
 
 # load the common Makefile.features for Nucleo boards
 include $(RIOTBOARD)/common/nucleo64/Makefile.features

boards/nucleo-f446/include/periph_conf.h

@@ -161,16 +161,6 @@ static const pwm_conf_t pwm_config[] = {
         .af       = GPIO_AF1,
         .bus      = APB1
     },
-    {
-        .dev      = TIM3,
-        .rcc_mask = RCC_APB1ENR_TIM3EN,
-        .chan     = { { .pin = GPIO_PIN(PORT_B, 4), .cc_chan = 0 },
-                      { .pin = GPIO_UNDEF, .cc_chan = 0 },
-                      { .pin = GPIO_UNDEF, .cc_chan = 0 },
-                      { .pin = GPIO_UNDEF, .cc_chan = 0 } },
-        .af       = GPIO_AF2,
-        .bus      = APB1
-    },
     {
         .dev      = TIM8,
         .rcc_mask = RCC_APB2ENR_TIM8EN,
@@ -186,6 +176,39 @@ static const pwm_conf_t pwm_config[] = {
 #define PWM_NUMOF           (sizeof(pwm_config) / sizeof(pwm_config[0]))
 /** @} */
 
+/**
+ * @name    QDEC configuration
+ * @{
+ */
+static const qdec_conf_t qdec_config[] = {
+    {
+        .dev      = TIM3,
+        .max      = 0xffffffff,
+        .rcc_mask = RCC_APB1ENR_TIM3EN,
+        .chan     = { { .pin = GPIO_PIN(PORT_A, 6), .cc_chan = 0 },
+                      { .pin = GPIO_PIN(PORT_A, 7), .cc_chan = 1 } },
+        .af       = GPIO_AF2,
+        .bus      = APB1,
+        .irqn     = TIM3_IRQn
+    },
+    {
+        .dev      = TIM4,
+        .max      = 0xffffffff,
+        .rcc_mask = RCC_APB1ENR_TIM4EN,
+        .chan     = { { .pin = GPIO_PIN(PORT_B, 6), .cc_chan = 0 },
+                      { .pin = GPIO_PIN(PORT_B, 7), .cc_chan = 1 } },
+        .af       = GPIO_AF2,
+        .bus      = APB1,
+        .irqn     = TIM4_IRQn
+    },
+};
+
+#define QDEC_0_ISR         isr_tim3
+#define QDEC_1_ISR         isr_tim4
+
+#define QDEC_NUMOF           (sizeof(qdec_config) / sizeof(qdec_config[0]))
+/** @} */
+
 /**
  * @name   SPI configuration
  *