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Commit 9450fa7d authored by Dylan Laduranty's avatar Dylan Laduranty
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cpu/sam0_common: add support for saml10/saml11

Add SAML10/SAML11 support through SAM0 because hardware IP are the same so reuse to avoid duplication
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with 8391 additions and 6 deletions
......@@ -6,12 +6,18 @@ ifneq (,$(filter samd21g18a samd21j18a saml21j18b saml21j18a samr21g18a samr30g1
ROM_LEN ?= 0x40000
RAM_LEN ?= 0x8000
endif
ifneq (,$(filter saml10e16a saml11e16a,$(CPU_MODEL)))
ROM_LEN ?= 64K
RAM_LEN ?= 16K
endif
ROM_START_ADDR ?= 0x00000000
RAM_START_ADDR ?= 0x20000000
# this CPU implementation doesn't use CMSIS initialization
export CFLAGS += -DDONT_USE_CMSIS_INIT
export CFLAGS += -DDONT_USE_PREDEFINED_CORE_HANDLERS
export CFLAGS += -DDONT_USE_PREDEFINED_PERIPHERALS_HANDLERS
# For Cortex-M cpu we use the common cortexm.ld linker script
LINKER_SCRIPT ?= cortexm.ld
......
......@@ -22,7 +22,11 @@
#define CPU_CONF_H
#include "cpu_conf_common.h"
#if defined(CPU_SAML1X)
#include "vendor/sam23.h"
#else
#include "vendor/sam0.h"
#endif
#ifdef __cplusplus
extern "C" {
......
......@@ -69,7 +69,11 @@ typedef uint32_t gpio_t;
* @brief Macro for accessing GPIO pins
* @{
*/
#ifdef CPU_FAM_SAML11
#define GPIO_PIN(x, y) (((gpio_t)(&PORT_SEC->Group[x])) | y)
#else
#define GPIO_PIN(x, y) (((gpio_t)(&PORT->Group[x])) | y)
#endif
/**
* @brief Available ports on the SAMD21 & SAML21
......@@ -94,7 +98,11 @@ enum {
* @name Power mode configuration
* @{
*/
#ifdef CPU_FAM_SAML11
#define PM_NUM_MODES (2)
#else
#define PM_NUM_MODES (3)
#endif
/** @} */
#ifndef DOXYGEN
......@@ -127,6 +135,7 @@ typedef enum {
/**
* @brief Available MUX values for configuring a pin's alternate function
*/
#ifndef SAM_MUX_T
typedef enum {
GPIO_MUX_A = 0x0, /**< select peripheral function A */
GPIO_MUX_B = 0x1, /**< select peripheral function B */
......@@ -137,6 +146,7 @@ typedef enum {
GPIO_MUX_G = 0x6, /**< select peripheral function G */
GPIO_MUX_H = 0x7, /**< select peripheral function H */
} gpio_mux_t;
#endif
/**
* @brief Available values for SERCOM UART RX pad selection
......@@ -298,6 +308,8 @@ static inline int sercom_id(void *sercom)
{
#if defined(CPU_FAM_SAMD21)
return ((((uint32_t)sercom) >> 10) & 0x7) - 2;
#elif defined (CPU_FAM_SAML10) || defined (CPU_FAM_SAML11)
return ((((uint32_t)sercom) >> 10) & 0x7) - 1;
#elif defined(CPU_FAM_SAML21) || defined(CPU_FAM_SAMR30)
/* Left side handles SERCOM0-4 while right side handles unaligned address of SERCOM5 */
return ((((uint32_t)sercom) >> 10) & 0x7) + ((((uint32_t)sercom) >> 22) & 0x04);
......@@ -313,12 +325,15 @@ static inline void sercom_clk_en(void *sercom)
{
#if defined(CPU_FAM_SAMD21)
PM->APBCMASK.reg |= (PM_APBCMASK_SERCOM0 << sercom_id(sercom));
#elif defined(CPU_FAM_SAML21) || defined(CPU_FAM_SAMR30)
#else
if (sercom_id(sercom) < 5) {
MCLK->APBCMASK.reg |= (MCLK_APBCMASK_SERCOM0 << sercom_id(sercom));
} else {
}
#if defined(CPU_FAM_SAML21)
else {
MCLK->APBDMASK.reg |= (MCLK_APBDMASK_SERCOM5);
}
#endif /* CPU_FAM_SAML21 */
#endif
}
......@@ -331,12 +346,15 @@ static inline void sercom_clk_dis(void *sercom)
{
#if defined(CPU_FAM_SAMD21)
PM->APBCMASK.reg &= ~(PM_APBCMASK_SERCOM0 << sercom_id(sercom));
#elif defined(CPU_FAM_SAML21) || defined(CPU_FAM_SAMR30)
#else
if (sercom_id(sercom) < 5) {
MCLK->APBCMASK.reg &= ~(MCLK_APBCMASK_SERCOM0 << sercom_id(sercom));
} else {
}
#if defined (CPU_FAM_SAML21)
else {
MCLK->APBDMASK.reg &= ~(MCLK_APBDMASK_SERCOM5);
}
#endif /* CPU_FAM_SAML21 */
#endif
}
......@@ -352,14 +370,17 @@ static inline void sercom_set_gen(void *sercom, uint32_t gclk)
GCLK->CLKCTRL.reg = (GCLK_CLKCTRL_CLKEN | gclk |
(SERCOM0_GCLK_ID_CORE + sercom_id(sercom)));
while (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY) {}
#elif defined(CPU_FAM_SAML21) || defined(CPU_FAM_SAMR30)
#else
if (sercom_id(sercom) < 5) {
GCLK->PCHCTRL[SERCOM0_GCLK_ID_CORE + sercom_id(sercom)].reg =
(GCLK_PCHCTRL_CHEN | gclk);
} else {
}
#if defined(CPU_FAM_SAML21)
else {
GCLK->PCHCTRL[SERCOM5_GCLK_ID_CORE].reg =
(GCLK_PCHCTRL_CHEN | gclk);
}
#endif /* CPU_FAM_SAML21 */
#endif
}
......
/*
* Copyright (C) 2018 Mesotic SAS
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_saml1x
* @{
*
* @file
* @brief Wrapper include file for including the specific
* SAML10/SAML11 vendor header
*
* @author Dylan Laduranty <dylan.laduranty@mesotic.com>
*/
#ifndef SAM23_H
#define SAM23_H
#ifdef __cplusplus
extern "C" {
#endif
/* Workaround redefinition of LITTLE_ENDIAN macro (part1) */
#ifdef LITTLE_ENDIAN
#define __TMP_LITTLE_ENDIAN LITTLE_ENDIAN
#undef LITTLE_ENDIAN
#endif
#if defined(CPU_MODEL_SAML10D14A)
#include "vendor/saml10/include/saml10d14a.h"
#elif defined(CPU_MODEL_SAML10D15A)
#include "vendor/saml10/include/saml10d15a.h"
#elif defined(CPU_MODEL_SAML10D16A)
#include "vendor/saml10/include/saml10d16a.h"
#elif defined(CPU_MODEL_SAML10E14A)
#include "vendor/saml10/include/saml10e14a.h"
#elif defined(CPU_MODEL_SAML10E15A)
#include "vendor/saml10/include/saml10e15a.h"
#elif defined(CPU_MODEL_SAML10E16A)
#include "vendor/saml10/include/saml10e16a.h"
#elif defined(CPU_MODEL_SAML11D14A)
#include "vendor/saml11/include/saml11d14a.h"
#elif defined(CPU_MODEL_SAML11D15A)
#include "vendor/saml11/include/saml11d15a.h"
#elif defined(CPU_MODEL_SAML11D16A)
#include "vendor/saml11/include/saml11d16a.h"
#elif defined(CPU_MODEL_SAML11E14A)
#include "vendor/saml11/include/saml11e14a.h"
#elif defined(CPU_MODEL_SAML11E15A)
#include "vendor/saml11/include/saml11e15a.h"
#elif defined(CPU_MODEL_SAML11E16A)
#include "vendor/saml11/include/saml11e16a.h"
#else
#error "Unsupported SAM23 variant."
#endif
/* Workaround redefinition of LITTLE_ENDIAN macro (part2) */
#ifdef LITTLE_ENDIAN
#undef LITTLE_ENDIAN
#endif
#ifdef __TMP_LITTLE_ENDIAN
#define LITTLE_ENDIAN __TMP_LITTLE_ENDIAN
#endif
#ifdef __cplusplus
}
#endif
#endif /* SAM23_H */
/** @} */
/**
* \file
*
* \brief Component version header file
*
* Copyright (c) 2018 Atmel Corporation, a wholly owned subsidiary of Microchip Technology Inc.
*
* \license_start
*
* \page License
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* \license_stop
*
*/
#ifndef _COMPONENT_VERSION_H_INCLUDED
#define _COMPONENT_VERSION_H_INCLUDED
#define COMPONENT_VERSION_MAJOR 1
#define COMPONENT_VERSION_MINOR 0
//
// The COMPONENT_VERSION define is composed of the major and the minor version number.
//
// The last four digits of the COMPONENT_VERSION is the minor version with leading zeros.
// The rest of the COMPONENT_VERSION is the major version.
//
#define COMPONENT_VERSION 10000
//
// The build number does not refer to the component, but to the build number
// of the device pack that provides the component.
//
#define BUILD_NUMBER 142
//
// The COMPONENT_VERSION_STRING is a string (enclosed in ") that can be used for logging or embedding.
//
#define COMPONENT_VERSION_STRING "1.0"
//
// The COMPONENT_DATE_STRING contains a timestamp of when the pack was generated.
//
// The COMPONENT_DATE_STRING is written out using the following strftime pattern.
//
// "%Y-%m-%d %H:%M:%S"
//
//
#define COMPONENT_DATE_STRING "2018-09-06 14:18:38"
#endif/* #ifndef _COMPONENT_VERSION_H_INCLUDED */
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