boards/nrf51dk: add initial support

boards/nrf51dk/Makefile

+MODULE = board
+
+include $(RIOTBASE)/Makefile.base

boards/nrf51dk/Makefile.dep

+ifneq (,$(filter saul_default,$(USEMODULE)))
+  USEMODULE += saul_gpio
+endif
+
+include $(RIOTBOARD)/common/nrf51/Makefile.dep

boards/nrf51dk/Makefile.features

+# Put defined MCU peripherals here (in alphabetical order)
+FEATURES_PROVIDED += periph_i2c
+FEATURES_PROVIDED += periph_spi
+FEATURES_PROVIDED += periph_uart
+
+# include common nrf51 based boards features
+include $(RIOTBOARD)/common/nrf51/Makefile.features

boards/nrf51dk/Makefile.include

+# define the used CPU
+export CPU_MODEL = nrf51x22xxac
+
+# define the default port depending on the host OS
+PORT_LINUX ?= /dev/ttyACM0
+PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*)))
+
+# use openocd by default to program this board
+PROGRAMMER ?= openocd
+
+# dap debug adapter is required for openocd
+ifeq (openocd,$(PROGRAMMER))
+  DEBUG_ADAPTER = dap
+endif
+
+# include nrf51 boards common configuration
+include $(RIOTBOARD)/common/nrf51/Makefile.include

boards/nrf51dk/board.c

+/*
+ * Copyright (C) 2018 Inria
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_nrf51dk
+ * @{
+ *
+ * @file
+ * @brief       Board initialization code for the nRF51DK
+ *
+ * @author      Alexandre Abadie <alexandre.abadie@inria.fr>
+ *
+ * @}
+ */
+
+#include "board.h"
+#include "periph/gpio.h"
+
+void board_init(void)
+{
+    /* initialize the board LEDs, set pins as output and turn LEDs off */
+    gpio_init(LED0_PIN, GPIO_OUT);
+    gpio_init(LED1_PIN, GPIO_OUT);
+    gpio_init(LED2_PIN, GPIO_OUT);
+    gpio_init(LED3_PIN, GPIO_OUT);
+    gpio_set(LED0_PIN);
+    gpio_set(LED1_PIN);
+    gpio_set(LED2_PIN);
+    gpio_set(LED3_PIN);
+
+    /* initialize the board buttons */
+    gpio_init(BTN0_PIN, BTN0_MODE);
+    gpio_init(BTN1_PIN, BTN1_MODE);
+    gpio_init(BTN2_PIN, BTN2_MODE);
+    gpio_init(BTN3_PIN, BTN3_MODE);
+
+    /* initialize the CPU */
+    cpu_init();
+}

boards/nrf51dk/doc.txt

+/**
+@defgroup    boards_nrf51dk nRF51DK Development Kit
+@ingroup     boards
+@brief       Support for the Nordic nRF51DK Development Kit
+
+## Overview:
+
+The nRF51 DK is a low-cost, versatile single-board development kit for
+Bluetooth low energy, ANT and 2.4GHz proprietary applications using the nRF51
+Series SoC.
+
+## Flashing the Device:
+
+The nRF51DK board is shipped with an on-board JLink debugger that doesn't work
+well with UART: the shell is only working on RX but not TX.
+
+Thus, we recommend to update the flasher ship with DAPLink as described
+[here](https://armmbed.github.io/DAPLink/?board=Nordic-nRF51-DK):
+1. Download [this firmware](https://armmbed.github.io/DAPLink//firmware/0251_sam3u2c_mkit_dk_dongle_nrf5x_0x5000.bin)
+2. While holding down the boards reset button, connect the boards USB debug
+   port to the computer. It should enumerate as `BOOTLOADER`
+3. Using a filesystem browser, drag-n-drop the firmware file to the
+   `BOOTLOADER` folder
+4. Power-cycle the board, a new DAPLink mount point should appear
+
+The programmer used to flash this board is OpenOCD.
+
+To flash the board, use the following command:
+```
+$ make BOARD=nrf51dk flash
+```
+from any application directory.
+ */

boards/nrf51dk/include/board.h

+/*
+ * Copyright (C) 2018 Inria
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_nrf51dk
+ * @{
+ *
+ * @file
+ * @brief       Board specific configuration for the nRF51DK
+ *
+ * @author      Alexandre Abadie <alexandre.abadie@inria.fr>
+ */
+
+#ifndef BOARD_H
+#define BOARD_H
+
+#include "board_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @name    LED pin definitions and handlers
+ * @{
+ */
+#define LED0_PIN            GPIO_PIN(0, 21)
+#define LED1_PIN            GPIO_PIN(0, 22)
+#define LED2_PIN            GPIO_PIN(0, 23)
+#define LED3_PIN            GPIO_PIN(0, 24)
+
+#define LED0_MASK           (1 << 21)
+#define LED1_MASK           (1 << 22)
+#define LED2_MASK           (1 << 23)
+#define LED3_MASK           (1 << 24)
+
+#define LED0_ON             (NRF_GPIO->OUTCLR = LED0_MASK)
+#define LED0_OFF            (NRF_GPIO->OUTSET = LED0_MASK)
+#define LED0_TOGGLE         (NRF_GPIO->OUT   ^= LED0_MASK)
+
+#define LED1_ON             (NRF_GPIO->OUTCLR = LED1_MASK)
+#define LED1_OFF            (NRF_GPIO->OUTSET = LED1_MASK)
+#define LED1_TOGGLE         (NRF_GPIO->OUT   ^= LED1_MASK)
+
+#define LED2_ON             (NRF_GPIO->OUTCLR = LED2_MASK)
+#define LED2_OFF            (NRF_GPIO->OUTSET = LED2_MASK)
+#define LED2_TOGGLE         (NRF_GPIO->OUT   ^= LED2_MASK)
+
+#define LED3_ON             (NRF_GPIO->OUTCLR = LED3_MASK)
+#define LED3_OFF            (NRF_GPIO->OUTSET = LED3_MASK)
+#define LED3_TOGGLE         (NRF_GPIO->OUT   ^= LED3_MASK)
+/** @} */
+
+/**
+ * @name    Button pin definitions
+ * @{
+ */
+#define BTN0_PIN            GPIO_PIN(0, 17)
+#define BTN0_MODE           GPIO_IN_PU
+#define BTN1_PIN            GPIO_PIN(0, 18)
+#define BTN1_MODE           GPIO_IN_PU
+#define BTN2_PIN            GPIO_PIN(0, 19)
+#define BTN2_MODE           GPIO_IN_PU
+#define BTN3_PIN            GPIO_PIN(0, 20)
+#define BTN3_MODE           GPIO_IN_PU
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H */
+/** @} */

boards/nrf51dk/include/gpio_params.h

+/*
+ * Copyright (C) 2018 Inria
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_nrf51dk
+ * @{
+ *
+ * @file
+ * @brief       Configuration of SAUL mapped GPIO pins
+ *
+ * @author      Alexandre Abadie <alexandre.abadie@inria.fr>
+ */
+
+#ifndef GPIO_PARAMS_H
+#define GPIO_PARAMS_H
+
+#include "board.h"
+#include "saul/periph.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief    LED configuration
+ */
+static const  saul_gpio_params_t saul_gpio_params[] =
+{
+    {
+        .name  = "LED 1",
+        .pin   = LED0_PIN,
+        .mode  = GPIO_OUT,
+        .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR),
+    },
+    {
+        .name  = "LED 2",
+        .pin   = LED1_PIN,
+        .mode  = GPIO_OUT,
+        .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR),
+    },
+    {
+        .name  = "LED 3",
+        .pin   = LED2_PIN,
+        .mode  = GPIO_OUT,
+        .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR),
+    },
+    {
+        .name  = "LED 4",
+        .pin   = LED3_PIN,
+        .mode  = GPIO_OUT,
+        .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR),
+    },
+    {
+        .name  = "Button 1",
+        .pin   = BTN0_PIN,
+        .mode  = BTN0_MODE,
+        .flags = SAUL_GPIO_INVERTED,
+    },
+    {
+        .name  = "Button 2",
+        .pin   = BTN1_PIN,
+        .mode  = BTN1_MODE,
+        .flags = SAUL_GPIO_INVERTED,
+    },
+    {
+        .name  = "Button 3",
+        .pin   = BTN2_PIN,
+        .mode  = BTN2_MODE,
+        .flags = SAUL_GPIO_INVERTED,
+    },
+    {
+        .name  = "Button 4",
+        .pin   = BTN3_PIN,
+        .mode  = BTN3_MODE,
+        .flags = SAUL_GPIO_INVERTED,
+    },
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* GPIO_PARAMS_H */
+/** @} */

boards/nrf51dk/include/periph_conf.h

+/*
+ * Copyright (C) 2018 Inria
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_nrf51dk
+ * @{
+ *
+ * @file
+ * @brief       Peripheral configuration for the Nordic nRF51DK
+ *
+ * @author      Alexandre Abadie <alexandre.abadie@inria.fr>
+ */
+
+#ifndef PERIPH_CONF_H
+#define PERIPH_CONF_H
+
+#include "periph_cpu.h"
+#include "periph_conf_common.h"
+#include "cfg_clock_16_1.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @name UART configuration
+ * @{
+ */
+#define UART_NUMOF          (1U)
+/* UART pin configuration */
+#define UART_HWFLOWCTRL     1
+#define UART_PIN_RX         11
+#define UART_PIN_TX         9
+#define UART_PIN_RTS        8
+#define UART_PIN_CTS        10
+/** @} */
+
+/**
+ * @name    SPI configuration
+ * @{
+ */
+static const spi_conf_t spi_config[] = {
+    {
+        .dev  = NRF_SPI0,
+        .sclk = 29,
+        .mosi = 25,
+        .miso = 28
+    }
+};
+
+#define SPI_NUMOF           (sizeof(spi_config) / sizeof(spi_config[0]))
+/** @} */
+
+/**
+ * @name    I2C configuration
+ * @{
+ */
+static const i2c_conf_t i2c_config[] = {
+    {
+        .dev = NRF_TWI1,
+        .pin_scl = 7,
+        .pin_sda = 30,
+        .ppi     = 0,
+        .speed = I2C_SPEED_NORMAL
+    }
+};
+
+#define I2C_NUMOF           (sizeof(i2c_config) / sizeof(i2c_config[0]))
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PERIPH_CONF_H */
+/** @} */