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Commit ab60f9dc authored by kYc0o's avatar kYc0o
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cpu/stm32*/ldscripts: remove all stm32 family linker scripts

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/*
* Copyright (C) 2016 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F030R8
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F031K6
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 32K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2016 OTA keys
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F042K6
*
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 32K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 6K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F051R8
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2016 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F070RB
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F072RB
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F091RC
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 256K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Alexander Melnikov <avmelnikoff@gmail.com>
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief Memory definitions for the STM32F103C8
*
* @author Alexander Melnikov <avmelnikoff@gmail.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Alexander Melnikov <avmelnikoff@gmail.com>
* 2017 HAW Hamburg
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief Memory definitions for the STM32F103C8
*
* @author Alexander Melnikov <avmelnikoff@gmail.com>
* @author Sebastian Meiling <s@mlng.net>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08002000, LENGTH = 64K-0x2000
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief Memory definitions for the STM32F103CB
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2017 INRIA
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief OpenCM9.04 specific definitions for the STM32F103CB
*
* @author Loïc Dauphin <loic.dauphin@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08003000, LENGTH = 128K-0x3000
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief Spark-core specific memory definitions for the STM32F103CB
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08005000, LENGTH = 128K-0x5000
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 TriaGnoSys GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief Memory definitions for the STM32F103RB
*
* @author Victor Ariño <victor.arino@triagnosys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief Memory definitions for the STM32F103RE
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Engineering-Spirit
* Copyright (C) 2016 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f2
* @{
*
* @file
* @brief Memory definitions for the STM32F205RG
*
* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Engineering-Spirit
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f2
* @{
*
* @file
* @brief Memory definitions for the STM32F207ZG
*
* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Engineering-Spirit
* Copyright (C) 2016 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f2
* @{
*
* @file
* @brief Memory definitions for the STM32F215RG
*
* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Engineering-Spirit
* Copyright (C) 2016 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f2
* @{
*
* @file
* @brief Memory definitions for the STM32F215VG
*
* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Engineering-Spirit
* Copyright (C) 2016 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f2
* @{
*
* @file
* @brief Memory definitions for the STM32F215VG
*
* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld
/*
* Copyright (C) 2015 Engineering-Spirit
* Copyright (C) 2016 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f2
* @{
*
* @file
* @brief Memory definitions for the STM32F217ZG
*
* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld
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