cpu/nrf5x_common: adapted GPIO driver

cpu/nrf5x_common/include/periph_cpu.h

@@ -54,15 +54,33 @@ extern "C" {
 #define GPIO_PIN(x,y)       ((x & 0) | y)
 
 /**
- * @brief   Override GPIO pull register select values
+ * @brief   Generate GPIO mode bitfields
+ *
+ * We use 4 bit to encode the pin mode:
+ * - bit   0: output enable
+ * - bit   1: input connect
+ * - bit 2+3: pull resistor configuration
+ */
+#define GPIO_MODE(oe, ic, pr)   (oe | (ic << 1) | (pr << 2))
+
+/**
+ * @brief   Override GPIO modes
+ *
+ * We use 4 bit to encode the pin mode:
+ * - bit   0: output enable
+ * - bit   1: input connect
+ * - bit 2+3: pull resistor configuration
  * @{
  */
-#define HAVE_GPIO_PP_T
+#define HAVE_GPIO_MODE_T
 typedef enum {
-    GPIO_NOPULL = 0,        /**< do not use internal pull resistors */
-    GPIO_PULLUP = 3,        /**< enable internal pull-up resistor */
-    GPIO_PULLDOWN = 1       /**< enable internal pull-down resistor */
-} gpio_pp_t;
+    GPIO_IN    = GPIO_MODE(0, 0, 0),    /**< IN */
+    GPIO_IN_PD = GPIO_MODE(0, 0, 1),    /**< IN with pull-down */
+    GPIO_IN_PU = GPIO_MODE(0, 0, 3),    /**< IN with pull-up */
+    GPIO_OUT   = GPIO_MODE(1, 1, 0),    /**< OUT (push-pull) */
+    GPIO_OD    = (0xff),                /**< not supported by HW */
+    GPIO_OD_PU = (0xfe)                 /**< not supported by HW */
+} gpio_mode_t;
 /** @} */
 
 /**

cpu/nrf5x_common/periph/gpio.c

@@ -38,16 +38,24 @@
 static gpio_isr_ctx_t exti_chan;
 
 
-int gpio_init(gpio_t pin, gpio_dir_t dir, gpio_pp_t pullup)
+int gpio_init(gpio_t pin, gpio_mode_t mode)
 {
-    /* configure pin direction, input buffer and pull resistor state */
-    GPIO_BASE->PIN_CNF[pin] = ((dir << GPIO_PIN_CNF_DIR_Pos) |
-                               (dir << GPIO_PIN_CNF_INPUT_Pos) |
-                               (pullup << GPIO_PIN_CNF_PULL_Pos));
+    switch (mode) {
+        case GPIO_IN:
+        case GPIO_IN_PD:
+        case GPIO_IN_PU:
+        case GPIO_OUT:
+            /* configure pin direction, input buffer and pull resistor state */
+            GPIO_BASE->PIN_CNF[pin] = mode;
+            break;
+        default:
+            return -1;
+    }
+
     return 0;
 }
 
-int gpio_init_int(gpio_t pin, gpio_pp_t pullup, gpio_flank_t flank,
+int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
                   gpio_cb_t cb, void *arg)
 {
     /* disable external interrupt in case one is active */
@@ -56,7 +64,7 @@ int gpio_init_int(gpio_t pin, gpio_pp_t pullup, gpio_flank_t flank,
     exti_chan.cb = cb;
     exti_chan.arg = arg;
     /* configure pin as input */
-    gpio_init(pin, GPIO_DIR_IN, pullup);
+    gpio_init(pin, mode);
     /* set interrupt priority and enable global GPIOTE interrupt */
     NVIC_EnableIRQ(GPIOTE_IRQn);
     /* configure the GPIOTE channel: set even mode, pin and active flank */