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Commit c9c4b7fb authored by Oleg Hahm's avatar Oleg Hahm
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Merge pull request #30 from thomaseichinger/uart_fixes

fix for the mc1322x uart
parents 61eff404 8ae50ef8
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...@@ -21,8 +21,8 @@ $(BINDIR)$(ARCH): $(OBJ) ...@@ -21,8 +21,8 @@ $(BINDIR)$(ARCH): $(OBJ)
# compile and generate dependency info # compile and generate dependency info
$(BINDIR)%.o: %.c $(BINDIR)%.o: %.c
$(CC) $(CFLAGS) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -c $*.c -o $(BINDIR)$*.o $(CC) $(CFLAGS) $(CFLAGS_MTHUMB) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -c $*.c -o $(BINDIR)$*.o
$(CC) $(CFLAGS) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -MM $*.c > $(BINDIR)$*.d $(CC) $(CFLAGS) $(CFLAGS_MTHUMB) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -MM $*.c > $(BINDIR)$*.d
@printf "$(BINDIR)"|cat - $(BINDIR)$*.d > /tmp/riot_out && mv /tmp/riot_out $(BINDIR)$*.d @printf "$(BINDIR)"|cat - $(BINDIR)$*.d > /tmp/riot_out && mv /tmp/riot_out $(BINDIR)$*.d
# remove compilation products # remove compilation products
......
...@@ -6,13 +6,11 @@ export PREFIX = @arm-none-eabi- ...@@ -6,13 +6,11 @@ export PREFIX = @arm-none-eabi-
export CC = @$(PREFIX)gcc export CC = @$(PREFIX)gcc
export AR = @$(PREFIX)ar export AR = @$(PREFIX)ar
export CFLAGS = -std=gnu99 -march=armv4t -mtune=arm7tdmi-s -mlong-calls \ export CFLAGS = -std=gnu99 -march=armv4t -mtune=arm7tdmi-s -mlong-calls \
export CFLAGS_BASIC = -std=gnu99 -march=armv4t -mtune=arm7tdmi-s -mlong-calls \
-msoft-float -mthumb-interwork -fno-strict-aliasing -fno-common \ -msoft-float -mthumb-interwork -fno-strict-aliasing -fno-common \
-ffixed-r8 -ffunction-sections -ffreestanding -fno-builtin \ -ffixed-r8 -ffunction-sections -ffreestanding -fno-builtin \
-nodefaultlibs -Wcast-align -Wall -Wstrict-prototypes -Wextra \ -nodefaultlibs -Wcast-align -Wall -Wstrict-prototypes -Wextra \
-Os -pipe -Os -pipe
export CFLAGS += $(CFLAGS_BASIC) -mthumb export CFLAGS_MTHUMB ?= -mthumb
$(warning TODO add -mthumb) $(warning TODO add -mthumb)
export AFLAGS = -Wa,-gstabs $(CFLAGS) export AFLAGS = -Wa,-gstabs $(CFLAGS)
export AS = $(PREFIX)as export AS = $(PREFIX)as
......
...@@ -2,8 +2,8 @@ ...@@ -2,8 +2,8 @@
* board_init.c - redbee-econotag initialization code * board_init.c - redbee-econotag initialization code
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr> * Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
* *
* This source code is licensed under the GNU General Public License, * This source code is licensed under the GNU Lesser General Public License,
* Version 3. See the file LICENSE for more details. * Version 2. See the file LICENSE for more details.
*/ */
void board_init(void) void board_init(void)
......
...@@ -15,8 +15,8 @@ $(BINDIR)redbee-econotag_common_drivers.a: $(OBJ) ...@@ -15,8 +15,8 @@ $(BINDIR)redbee-econotag_common_drivers.a: $(OBJ)
# compile and generate dependency info # compile and generate dependency info
$(BINDIR)%.o: %.c $(BINDIR)%.o: %.c
$(CC) $(CFLAGS) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -c $*.c -o $(BINDIR)$*.o $(CC) $(CFLAGS) $(CFLAGS_MTHUMB) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -c $*.c -o $(BINDIR)$*.o
$(CC) $(CFLAGS) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -MM $*.c > $(BINDIR)$*.d $(CC) $(CFLAGS) $(CFLAGS_MTHUMB) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -MM $*.c > $(BINDIR)$*.d
@printf "$(BINDIR)" | cat - $(BINDIR)$*.d > /tmp/riot_out && mv /tmp/riot_out $(BINDIR)$*.d @printf "$(BINDIR)" | cat - $(BINDIR)$*.d > /tmp/riot_out && mv /tmp/riot_out $(BINDIR)$*.d
# remove compilation products # remove compilation products
......
...@@ -407,7 +407,7 @@ struct MACA_struct { ...@@ -407,7 +407,7 @@ struct MACA_struct {
{ {
uint32_t TXCCADELAY :12; // Delay from end of CCA to Tx start uint32_t TXCCADELAY :12; // Delay from end of CCA to Tx start
uint32_t :20; // reserved uint32_t :20; // reserved
}RXENDbits; }TXCCADELAYbits;
}; };
uint32_t KEY3; // see (9.7.45) uint32_t KEY3; // see (9.7.45)
uint32_t KEY2; // see (9.7.45) uint32_t KEY2; // see (9.7.45)
......
...@@ -2,8 +2,8 @@ ...@@ -2,8 +2,8 @@
* uart.h - UART driver for redbee * uart.h - UART driver for redbee
* Copyright (C) 2013 Thomas Eichinger <thomas.eichinger@fu-berlin.de> * Copyright (C) 2013 Thomas Eichinger <thomas.eichinger@fu-berlin.de>
* *
* This source code is licensed under the GNU General Public License, * This source code is licensed under the GNU Lesser General Public License,
* Version 3. See the file LICENSE for more details. * Version 2. See the file LICENSE for more details.
* *
* This file is part of RIOT. * This file is part of RIOT.
*/ */
...@@ -11,6 +11,8 @@ ...@@ -11,6 +11,8 @@
#ifndef UART_H #ifndef UART_H
#define UART_H #define UART_H
#include <stdint.h>
/*-----------------------------------------------------------------*/ /*-----------------------------------------------------------------*/
/* UART */ /* UART */
#define UART1_BASE (0x80005000) #define UART1_BASE (0x80005000)
...@@ -20,73 +22,68 @@ struct UART_struct { ...@@ -20,73 +22,68 @@ struct UART_struct {
union { union {
uint32_t CON; uint32_t CON;
struct UART_CON { struct UART_CON {
uint32_t : 16; uint32_t TXE: 1; /*< Tx Enable */
uint32_t TST: 1; uint32_t RXE: 1; /*< Rx Enable */
uint32_t MRXR: 1; uint32_t PEN: 1; /*< Parity Enable */
uint32_t MTXR: 1; uint32_t EP: 1; /*< Even Parity (1=Odd, 0=Even) */
uint32_t FCE: 1; uint32_t ST2: 1; /*< Enable 2 Stop Bits */
uint32_t FCP: 1; uint32_t SB: 1; /*< Send Break */
uint32_t XTIM: 1; uint32_t CONTX: 1; /*< Continuous Tx (Test Mode) */
uint32_t : 2; uint32_t TXOENB: 1; /*< TXD Outbut Disable */
uint32_t TXOENB: 1; uint32_t : 2; /*< reserved */
uint32_t CONTX: 1; uint32_t XTIM: 1; /*< Times of Oversampling */
uint32_t SB: 1; uint32_t FCP: 1; /*< Flow Control Polarity */
uint32_t ST2: 1; uint32_t FCE: 1; /*< Flow Control Enable */
uint32_t EP: 1; uint32_t MTXR: 1; /*< enable/disable TxRDY Interrupts */
uint32_t PEN: 1; uint32_t MRXR: 1; /*< enable/disable RxRDY Interrupts */
uint32_t RXE: 1; uint32_t TST: 1; /*< Test Loop-Back */
uint32_t TXE: 1; uint32_t : 16; /*< reserved */
} CONbits; } CONbits;
}; };
union { union {
uint32_t STAT; uint32_t STAT;
struct UART_STAT { struct UART_STAT {
uint32_t SE: 1; /*< Start Bit Error */
uint32_t PE: 1; /*< Parity Bit Error */
uint32_t FE: 1; /*< Frame/Stop Bit Error */
uint32_t TOE: 1; /*< Tx FIFO Overrun Error */
uint32_t ROE: 1; /*< Rx FIFO Overrun Error */
uint32_t RUE: 1; /*< Rx FIFO Underrun Error */
uint32_t RXRDY: 1; /*< Receiver is causing Interrupts */
uint32_t TXRDY: 1; /*< Transmitter is causing Interrupts */
uint32_t : 24; uint32_t : 24;
uint32_t TXRDY: 1;
uint32_t RXRDY: 1;
uint32_t RUE: 1;
uint32_t ROE: 1;
uint32_t TOE: 1;
uint32_t FE: 1;
uint32_t PE: 1;
uint32_t SE: 1;
} USTATbits; } USTATbits;
}; };
union { union {
uint32_t DATA; uint32_t DATA;
struct UART_DATA { struct UART_DATA {
uint32_t : 24;
uint32_t DATA: 8; uint32_t DATA: 8;
uint32_t : 24;
} DATAbits; } DATAbits;
}; };
union { union {
uint32_t RXCON; uint32_t RXCON;
struct UART_URXCON { struct UART_URXCON {
uint32_t : 26;
uint32_t LVL: 6; uint32_t LVL: 6;
uint32_t : 26;
} RXCONbits; } RXCONbits;
}; };
union { union {
uint32_t TXCON; uint32_t TXCON;
struct UART_TXCON { struct UART_TXCON {
uint32_t : 26;
uint32_t LVL: 6; uint32_t LVL: 6;
uint32_t : 26;
} TXCONbits; } TXCONbits;
}; };
union { union {
uint32_t CTS; uint32_t CTS;
struct UART_CTS { struct UART_CTS {
uint32_t : 27;
uint32_t LVL: 5; uint32_t LVL: 5;
uint32_t : 27;
} CTSbits; } CTSbits;
}; };
union {
uint32_t BR; uint32_t BR; /*< BR is 32bit access only */
struct UART_BR {
uint32_t INC: 16;
uint32_t MOD: 16;
} BRbits;
};
}; };
static volatile struct UART_struct *const UART1 = (void *)(UART1_BASE); static volatile struct UART_struct *const UART1 = (void *)(UART1_BASE);
...@@ -99,43 +96,10 @@ void uart_flow_ctl(volatile struct UART_struct *uart, uint8_t on); ...@@ -99,43 +96,10 @@ void uart_flow_ctl(volatile struct UART_struct *uart, uint8_t on);
#define UART0_BUFSIZE (32) #define UART0_BUFSIZE (32)
/* The mc1322x has a 32 byte hardware FIFO for transmitted characters.
* Currently it is always filled from a larger RAM buffer. It would be
* possible to eliminate that overhead by filling directly from a chain
* of data buffer pointers, but printf's would be not so easy.
*/
#define UART1_TX_BUFFERSIZE 1024
extern volatile uint32_t u1_tx_head, u1_tx_tail;
void uart1_putc(uint8_t c); void uart1_putc(uint8_t c);
/* The mc1322x has a 32 byte hardware FIFO for received characters.
* If a larger rx buffersize is specified the FIFO will be extended into RAM.
* RAM transfers will occur on interrupt when the FIFO is nearly full.
* If a smaller buffersize is specified hardware flow control will be
* initiated at that FIFO level.
* Set to 32 for no flow control or RAM buffer.
*/
#define UART1_RX_BUFFERSIZE 128
#if UART1_RX_BUFFERSIZE > 32
extern volatile uint32_t u1_rx_head, u1_rx_tail;
#define uart1_can_get() ((u1_rx_head!=u1_rx_tail) || (*UART1_URXCON > 0))
#else
#define uart1_can_get() (*UART1_URXCON > 0)
#endif
uint8_t uart1_getc(void); uint8_t uart1_getc(void);
#define UART2_TX_BUFFERSIZE 1024
extern volatile uint32_t u2_tx_head, u2_tx_tail;
void uart2_putc(uint8_t c); void uart2_putc(uint8_t c);
#define UART2_RX_BUFFERSIZE 128
#if UART2_RX_BUFFERSIZE > 32
extern volatile uint32_t u2_rx_head, u2_rx_tail;
#define uart2_can_get() ((u2_rx_head!=u2_rx_tail) || (*UART2_URXCON > 0))
#else
#define uart2_can_get() (*UART2_URXCON > 0)
#endif
uint8_t uart2_getc(void); uint8_t uart2_getc(void);
#endif #endif
\ No newline at end of file
...@@ -2,8 +2,8 @@ ...@@ -2,8 +2,8 @@
* redbee_uart.c - UART driver for redbee * redbee_uart.c - UART driver for redbee
* Copyright (C) 2013 Thomas Eichinger <thomas.eichinger@fu-berlin.de> * Copyright (C) 2013 Thomas Eichinger <thomas.eichinger@fu-berlin.de>
* *
* This source code is licensed under the GNU General Public License, * This source code is licensed under the GNU Lesser General Public License,
* Version 3. See the file LICENSE for more details. * Version 2. See the file LICENSE for more details.
* *
* This file is part of RIOT. * This file is part of RIOT.
*/ */
...@@ -11,7 +11,6 @@ ...@@ -11,7 +11,6 @@
#include "mc1322x.h" #include "mc1322x.h"
#include "uart.h" #include "uart.h"
#include "gpio.h" #include "gpio.h"
#include "io.h"
#define MOD_ 9999 #define MOD_ 9999
#define CLK_ 24000000 #define CLK_ 24000000
...@@ -26,16 +25,16 @@ void uart_set_baudrate(volatile struct UART_struct *uart, uint32_t baudrate) ...@@ -26,16 +25,16 @@ void uart_set_baudrate(volatile struct UART_struct *uart, uint32_t baudrate)
/* calculate inc following equation 13-1 from datasheet */ /* calculate inc following equation 13-1 from datasheet */
/* multiply by another 10 to get a fixed point*/ /* multiply by another 10 to get a fixed point*/
inc = ((uint64_t) baudrate * DIV_ * MOD_ * 10 / CLK_) - 10; inc = ((uint64_t) baudrate * DIV_ * MOD_ * 10 / CLK_) - 10;
/* add 5 and div by 10 to get a rounding */ /* add 5 and div by 10 to get a proper rounding */
inc = (inc + 5) / 10; inc = (inc + 5) / 10;
/* disable UARTx to set baudrate */ /* disable UARTx to set baudrate */
uart->CONbits.TXE = 0; uart->CONbits.TXE = 0;
uart->CONbits.RXE = 0; uart->CONbits.RXE = 0;
/* set baudrate */ /* set baudrate */
uart->BRbits.INC = inc; /* BR register is 32bit access only */
uart->BRbits.MOD = MOD_; uart->BR = (((uint16_t) inc << 16) | MOD_);
/* reenable UARTx again */ /* reenable UARTx again */
/* uart->CON.XTIM = 0 is 16x oversample (datasheet is incorrect) */ /* uart->CON.XTIM = 0 is 16x oversample (datasheet is incorrect) */
...@@ -92,7 +91,6 @@ void uart_flow_ctl(volatile struct UART_struct *uart, uint8_t on) ...@@ -92,7 +91,6 @@ void uart_flow_ctl(volatile struct UART_struct *uart, uint8_t on)
} }
} }
// TODO: clean from u*_(rx|tx)_(head|tail)
void uart_init(volatile struct UART_struct *uart, uint32_t baudrate) void uart_init(volatile struct UART_struct *uart, uint32_t baudrate)
{ {
/* enable the uart so we can set the gpio mode */ /* enable the uart so we can set the gpio mode */
...@@ -100,9 +98,6 @@ void uart_init(volatile struct UART_struct *uart, uint32_t baudrate) ...@@ -100,9 +98,6 @@ void uart_init(volatile struct UART_struct *uart, uint32_t baudrate)
uart->CONbits.TXE = 1; uart->CONbits.TXE = 1;
uart->CONbits.RXE = 1; uart->CONbits.RXE = 1;
/* interrupt when this or more bytes are free in the tx buffer */
uart->TXCON = 16;
if (uart == UART1) { if (uart == UART1) {
/* TX and RX direction */ /* TX and RX direction */
GPIO->PAD_DIR_SET.U1TX = 1; GPIO->PAD_DIR_SET.U1TX = 1;
...@@ -112,27 +107,17 @@ void uart_init(volatile struct UART_struct *uart, uint32_t baudrate) ...@@ -112,27 +107,17 @@ void uart_init(volatile struct UART_struct *uart, uint32_t baudrate)
GPIO->FUNC_SEL.U1TX = 1; GPIO->FUNC_SEL.U1TX = 1;
GPIO->FUNC_SEL.U1RX = 1; GPIO->FUNC_SEL.U1RX = 1;
UART1->CONbits.TXE = 1; /*< enable transmit */ UART1->CONbits.TXE = 1; /*< enable transmit */
UART1->CONbits.RXE = 1; /*< enable receive */ UART1->CONbits.RXE = 1; /*< enable receive */
#if UART1_RX_BUFFERSIZE > 32
UART1->RXCONbits.LVL = 30; /*< interrupt when fifo is nearly full */ UART1->CONbits.FCE = 1; /*< enable flowcontrol */
//u1_rx_head = 0; UART1->CONbits.MRXR = 1; /*< disable Rx interrupt */
//u1_rx_tail = 0; UART1->CTSbits.LVL = 31; /*< drop cts when tx buffer at trigger level */
#elif UART1_RX_BUFFERSIZE < 32 GPIO->FUNC_SEL.U1CTS = 1; /*< set GPIO 16 to UART1 CTS */
UART1->CONbits.FCE = 1; /*< enable flowcontrol */ GPIO->FUNC_SEL.U1RTS = 1; /*< set GPIO 17 to UART1 RTS */
UART1->CONbits.MRXR = 1; /*< disable Rx interrupt */
UART1->CTSbits.LVL = UART1_RX_BUFFERSIZE; /*< drop cts when tx buffer at trigger level */
GPIO->FUNC_SEL1.U1CTS = 1; /*< set GPIO 16 to UART1 CTS */
GPIO->FUNC_SEL1.U1RTS = 1; /*< set GPIO 17 to UART1 RTS */
#else
UART1->CONbits.MRXR = 1; /*< disable rx interrupt */
#endif
//u1_tx_head = 0;
//u1_tx_tail = 0;
//enable_irq(UART1);
ITC->INTENABLEbits.UART1 = 1; ITC->INTENABLEbits.UART1 = 1;
} }
else { else {
/* UART2 */ /* UART2 */
...@@ -144,30 +129,20 @@ void uart_init(volatile struct UART_struct *uart, uint32_t baudrate) ...@@ -144,30 +129,20 @@ void uart_init(volatile struct UART_struct *uart, uint32_t baudrate)
GPIO->FUNC_SEL.U2TX = 1; GPIO->FUNC_SEL.U2TX = 1;
GPIO->FUNC_SEL.U2RX = 1; GPIO->FUNC_SEL.U2RX = 1;
UART2->CONbits.TXE = 1; /*< enable transmit */ UART2->CONbits.TXE = 1; /*< enable transmit */
UART2->CONbits.RXE = 1; /*< enable receive */ UART2->CONbits.RXE = 1; /*< enable receive */
#if UART2_RX_BUFFERSIZE > 32
UART2->RXCONbits.LVL = 30; /*< interrupt when fifo is nearly full */ UART2->CONbits.FCE = 1; /*< enable flowcontrol */
//u2_rx_head = 0; UART2->CONbits.MRXR = 1; /*< disable Rx interrupt */
//u2_rx_tail = 0; UART2->CTSbits.LVL = 31; /*< drop cts when tx buffer at trigger level */
#elif UART2_RX_BUFFERSIZE < 32 GPIO->FUNC_SEL.U2CTS = 1; /*< set GPIO 20 to UART2 CTS */
UART2->CONbits.FCE = 1; /*< enable flowcontrol */ GPIO->FUNC_SEL.U2RTS = 1; /*< set GPIO 21 to UART2 RTS */
UART2->CONbits.MRXR = 1; /*< disable Rx interrupt */
UART2->CTSbits.LVL = UART2_RX_BUFFERSIZE; /*< drop cts when tx buffer at trigger level */
GPIO->FUNC_SEL1.U1CTS = 1; /*< set GPIO 16 to UART2 CTS */
GPIO->FUNC_SEL1.U1RTS = 1; /*< set GPIO 17 to UART2 RTS */
#else
UART2->CONbits.MRXR = 1; /*< disable rx interrupt */
#endif
// u2_tx_head = 0;
//u2_tx_tail = 0;
//enable_irq(UART2);
ITC->INTENABLEbits.UART2 = 1; ITC->INTENABLEbits.UART2 = 1;
} }
uart_set_baudrate(uart, baudrate); uart_set_baudrate(uart, baudrate);
} }
static inline uint32_t uart0_puts(uint8_t *astring, uint32_t length) static inline uint32_t uart0_puts(uint8_t *astring, uint32_t length)
...@@ -186,17 +161,16 @@ void stdio_flush(void) ...@@ -186,17 +161,16 @@ void stdio_flush(void)
ITC->INTENABLEbits.UART1 = 0; ITC->INTENABLEbits.UART1 = 0;
ITC->INTENABLEbits.UART2 = 0; ITC->INTENABLEbits.UART2 = 0;
while (UART1->RXCON != 0 || UART2->RXCON != 0) {
UART1->DATA;
UART2->DATA;
}
while (UART1->TXCON != 0 || UART2->TXCON != 0) {
/* wait */
}
ITC->INTENABLEbits.UART1 = 1; ITC->INTENABLEbits.UART1 = 1;
ITC->INTENABLEbits.UART2 = 1; ITC->INTENABLEbits.UART2 = 1;
/** taken from msba2-uart0.c
U0IER &= ~BIT1; // disable THRE interrupt
while(running) {
while(!(U0LSR & (BIT5|BIT6))){}; // transmit fifo
fifo=0;
push_queue(); // dequeue to fifo
}
U0IER |= BIT1; // enable THRE interrupt
*/
} }
...@@ -208,5 +182,4 @@ int fw_puts(char *astring, int length) ...@@ -208,5 +182,4 @@ int fw_puts(char *astring, int length)
int bl_uart_init(void) int bl_uart_init(void)
{ {
uart_init(UART1, BAUTRATE_UART1); uart_init(UART1, BAUTRATE_UART1);
uart_init(UART2, BAUTRATE_UART2);
} }
\ No newline at end of file
...@@ -3,8 +3,8 @@ ...@@ -3,8 +3,8 @@
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr> * Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
* 2013 Thomas Eichinger <thomas.eichinger@fu-berlin.de> * 2013 Thomas Eichinger <thomas.eichinger@fu-berlin.de>
* *
* This source code is licensed under the GNU General Public License, * This source code is licensed under the GNU Lesser General Public License,
* Version 3. See the file LICENSE for more details. * Version 2. See the file LICENSE for more details.
* *
* This file is part of RIOT. * This file is part of RIOT.
*/ */
...@@ -15,6 +15,8 @@ ...@@ -15,6 +15,8 @@
void uart1_isr(void) void uart1_isr(void)
{ {
uint32_t i = 0;
if (UART1->USTATbits.RXRDY == 1) { if (UART1->USTATbits.RXRDY == 1) {
#ifdef MODULE_UART0 #ifdef MODULE_UART0
......
...@@ -3,8 +3,8 @@ ...@@ -3,8 +3,8 @@
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr> * Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
* 2013 Thomas Eichinger <thomas.eichinger@fu-berlin.de> * 2013 Thomas Eichinger <thomas.eichinger@fu-berlin.de>
* *
* This source code is licensed under the GNU General Public License, * This source code is licensed under the GNU Lesser General Public License,
* Version 3. See the file LICENSE for more details. * Version 2. See the file LICENSE for more details.
* *
* This file is part of RIOT. * This file is part of RIOT.
*/ */
...@@ -15,7 +15,7 @@ ...@@ -15,7 +15,7 @@
void uart2_isr(void) void uart2_isr(void)
{ {
int i = 0; uint32_t i = 0;
if (UART2->USTATbits.RXRDY == 1) { if (UART2->USTATbits.RXRDY == 1) {
#ifdef MODULE_UART0 #ifdef MODULE_UART0
......
/**
* board.h - redbee-econotag Board.
* Copyright (C) 2013 Thomas Eichinger <thomas.eichinger@fu-berlin.de>
*
* This source code is licensed under the GNU Lesser General Public License,
* Version 2. See the file LICENSE for more details.
*/
#ifndef REDBEE_ECONOTAG_BOARD_H
#define REDBEE_ECONOTAG_BOARD_H
#define CTUNE 0xb
#define IBIAS 0x1f
#define FTUNE 0x7
#endif
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