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- Oct 11, 2018
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cladmi authored
The file always exist so no need to do '-include'. Replaced using: sed -i 's|-\(include $(RIOTCPU)/.*/Makefile.features\)|\1|' \ $(git grep -l '$(RIOTCPU)/.*/Makefile.features' boards)
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- Sep 20, 2018
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Hauke Petersen authored
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- Sep 11, 2018
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cladmi authored
Includes of $(CPU)/include and $(BOARD)/include and already added in the main Makefile.include. Verification: There are no common headers names between boards and cpus. Except native that has a 'periph_conf.h' in cpu instead of being in board.
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- Aug 29, 2018
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Joakim Nohlgård authored
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- Aug 01, 2018
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Jose Alamos authored
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Jose Alamos authored
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Jose Alamos authored
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- Apr 18, 2018
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Alexandre Abadie authored
- replace brief with name where required - remove some unwanted empty lines - fix missing closing doxygen name block
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- Jan 24, 2018
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Alexandre Abadie authored
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- Jan 15, 2018
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Neil Jones authored
In CPU definitions we should not be explicilty naming peripheral modules to use via USEMODULE (one should use FEATURES_PROVIDED instead). Plus add missing cpu_init() and periph_init() methods. This commit removes periph_hwrng support from the pic32mx cpu builds as pic32mx does not have hwrng only pic32mz does.
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- Nov 02, 2017
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Kaspar Schleiser authored
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- Sep 14, 2017
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Kaspar Schleiser authored
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- Sep 05, 2017
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Alexandre Abadie authored
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- Jul 20, 2017
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Francois Berder authored
Signed-off-by:
Francois Berder <fberder@outlook.fr>
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- Jun 28, 2017
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Neil Jones authored
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- May 05, 2017
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Francois Berder authored
Signed-off-by:
Francois Berder <fberder@outlook.fr>
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- Apr 19, 2017
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Francois Berder authored
U3RXREG is the RX buffer for UART3. U3RXR is the register for controlling the input pin for UART3. Signed-off-by:
Francois Berder <francois.berder@imgtec.com>
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Francois Berder authored
Signed-off-by:
Francois Berder <francois.berder@imgtec.com>
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- Apr 13, 2017
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Alexandre Abadie authored
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- Apr 12, 2017
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Francois Berder authored
Signed-off-by:
Francois Berder <francois.berder@imgtec.com>
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- Mar 29, 2017
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Neil Jones authored
This board features a pic32mx470f512h PIC32 device with a MIPS core.
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