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    9dc7cc25
    mmu: allow early tlb flushes · 9dc7cc25
    Glauber Costa authored
    
    TLB flushes cannot happen early, because we will try to send IPIs around before
    they are ready to go. Now, the funny thing is *why* that happen:
    
    We test for the size of the cpu vector to be 1. But before the cpus are
    initialized, that vector is empty. Because there is a limit on how soon we can
    initialize a cpu(), let's change the test to also acount for an empty vector.
    It should be obvious and clear that when we have an empty vector, only one cpu
    is present.
    
    I have triggered this in the context of my last patchset for threads. My test
    script was set to -c1 (sorry about that), and as soon as I tested it with SMP
    it exploded here.
    
    Signed-off-by: default avatarGlauber Costa <glommer@cloudius-systems.com>
    Signed-off-by: default avatarPekka Enberg <penberg@cloudius-systems.com>
    9dc7cc25
    History
    mmu: allow early tlb flushes
    Glauber Costa authored
    
    TLB flushes cannot happen early, because we will try to send IPIs around before
    they are ready to go. Now, the funny thing is *why* that happen:
    
    We test for the size of the cpu vector to be 1. But before the cpus are
    initialized, that vector is empty. Because there is a limit on how soon we can
    initialize a cpu(), let's change the test to also acount for an empty vector.
    It should be obvious and clear that when we have an empty vector, only one cpu
    is present.
    
    I have triggered this in the context of my last patchset for threads. My test
    script was set to -c1 (sorry about that), and as soon as I tested it with SMP
    it exploded here.
    
    Signed-off-by: default avatarGlauber Costa <glommer@cloudius-systems.com>
    Signed-off-by: default avatarPekka Enberg <penberg@cloudius-systems.com>