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Glauber Costa authored
Xen's shared info contains hardcoded space for only 32 CPUs. Because we use those structure to derive timing information, we would be basically accessing random memory after that. This is very hard to test and trigger, so what I'd did to demonstrate I was right (although that wasn't really needed, math could be used for that...) was to print the first timing information a cpu would produce. I could verify that the timing on CPUs > 32 was behind in time than the time produced in CPUs < 32. It is possible to move the vcpu area to a different location, but this is a relatively new feature of the Xen Hypervisor: Amazon won't support it. So we need a disable path anyway. I will open up an issue for somebody to implement that support eventually. Another user of the vcpu structure is interrupts. But for interrupts the story is easier, since we can select which CPUs we can take interrupts at, and only take them in the first 32 CPUs. In any case, we're taking them all in CPU0 now, so already under control Signed-off-by:
Glauber Costa <glommer@cloudius-systems.com> Signed-off-by:
Pekka Enberg <penberg@cloudius-systems.com>
Glauber Costa authoredXen's shared info contains hardcoded space for only 32 CPUs. Because we use those structure to derive timing information, we would be basically accessing random memory after that. This is very hard to test and trigger, so what I'd did to demonstrate I was right (although that wasn't really needed, math could be used for that...) was to print the first timing information a cpu would produce. I could verify that the timing on CPUs > 32 was behind in time than the time produced in CPUs < 32. It is possible to move the vcpu area to a different location, but this is a relatively new feature of the Xen Hypervisor: Amazon won't support it. So we need a disable path anyway. I will open up an issue for somebody to implement that support eventually. Another user of the vcpu structure is interrupts. But for interrupts the story is easier, since we can select which CPUs we can take interrupts at, and only take them in the first 32 CPUs. In any case, we're taking them all in CPU0 now, so already under control Signed-off-by:
Glauber Costa <glommer@cloudius-systems.com> Signed-off-by:
Pekka Enberg <penberg@cloudius-systems.com>