Add pci_{read|write|_word functions and some PCI definitions

drivers/pci.cc

@@ -15,6 +15,12 @@ u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset)
 	return inl(PCI_CONFIG_DATA);
 }
 
+u16 read_pci_config_word(u8 bus, u8 slot, u8 func, u8 offset)
+{
+    prepare_pci_config_access(bus, slot, func, offset);
+    return inw(PCI_CONFIG_DATA);
+}
+
 u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset)
 {
 	prepare_pci_config_access(bus, slot, func, offset);
@@ -27,6 +33,13 @@ void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, u32 val)
 	outl(val, PCI_CONFIG_DATA);
 }
 
+void write_pci_config_word(u8 bus, u8 slot, u8 func, u8 offset, u16 val)
+{
+    prepare_pci_config_access(bus, slot, func, offset);
+    outw(val, PCI_CONFIG_DATA);
+}
+
+
 void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val)
 {
     prepare_pci_config_access(bus, slot, func, offset);

drivers/pci.hh

@@ -21,15 +21,22 @@ using processor::outl;
 	    PCI_SLOT_OFFSET    = 11,
 	    PCI_FUNC_OFFSET    = 8,
 	    PCI_CONFIG_ADDRESS_ENABLE = 0x80000000,
+	    PCI_COMMAND_OFFSET = 0x4,
+	    PCI_STATUS_OFFSET  = 0x6,
 	    PCI_CLASS_REVISION = 0x8,
+	    PCI_CLASS_OFFSET   = 0xb,
+	    PCI_SUBCLASS_OFFSET= 0xa,
 	    PCI_HEADER_TYPE    = 0xe,
+	    PCI_SUBSYSTEM_ID   = 0x40,
+	    PCI_SUBSYSTEM_VID  = 0x42,
 	    PCI_HEADER_MULTI_FUNC = 0x80,
 	};
 
-
 	u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset);
+    u16 read_pci_config_word(u8 bus, u8 slot, u8 func, u8 offset);
 	u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset);
 	void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, u32 val);
+    void write_pci_config_word(u8 bus, u8 slot, u8 func, u8 offset, u16 val);
 	void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val);
 	void pci_device_print(u8 bus, u8 slot, u8 func);
 	void pci_devices_print(void);