It's somewhat complicated due to the red zone, but there's no way around it.

With this change, every cpu has its own independent runqueue.  Since we don't
support thread migration yet, and since threads inherit the cpu from their
parent, all threads except the smp bringup thread will still run on the boot
cpu.

With the current implementation, where the current cpu is a thread-local
variable, we cannot change the cpu pointer atomically during a context switch,
as we cannot obtain a pointer to a thread-local variable before the thread
has been run.

By moving the cpu pointer to the thread structure, we can change it atomically
by switching the thread-local base register (%fs on x64).

We need a per-cpu interrupt stack to allow smp interrupts; because we use
the IST mechanism, this requires a per-cpu TSS, which in turn suggests
a per-cpu GDT (this last could have been avoided at the expense of some
complexity).

We play with the tss, which is supposedly per-cpu, but this has not been
implemented yet.  Disable it temporarily.  Meanwhile, interrupts and
exceptions may not nest.

During initialization, we create a thread and switch to it immediately.  In
smp bringup, we must create the thread on the boot cpu (since thread local
storage is only initialized there so far), but obviously want to switch into
it on the new cpu.

To avoid too many variants, we simply create a thread that is off the runqueue,
and then either switch to it immediately with switch_to_first(), or defer it
to the smp bringup.

This has no functional benefit, it just allows testing the async
block layer and can be reverted later.

Use more common functionality, and don't attempt to preserve too much state
(tcb/tls) from the non-threaded boot environment.  Later we can unify this
with smp boot as well.

Struct bio gains a condition variable and a mutex to allow waiting for
I/O completions.  Still no support for returning errors, but that can
be added fairly easily.

Need to replace with something cleverer later.

We want the scheduler up when we launch smp, so we need to be in a thread
(mainly so s_current is valid).

Saves storage and removes a size depdendency.

The console is now smp safe.

A console driver that wraps another with a spinlock.  We usually don't want
spinlocks, but if we want to debug the scheduler, we have to use them here.

This removes the limit on the number of cpus we can boot.

Local APIC ID is different on x2apic, so we need a virtual function.

Used to initialize the APIC on non-boot processors.

for use in special cases only; normal threaded use should prefer mutex.

* 'master' of github.com:cloudius-systems/osv:
  bench: add context switch benchmark
  runtime: implement __cxa_guard_acquire()
  math: implement __isnan()
  mmu: implement page protection

While it works, it needs to move to the virtio layer

This isn't the right discovery mechnism and this should be simplified later on

osv:
     147 NanoTime
     574 context switch

fedora:
     322 NanoTime
    2484 context switch

(nanoseconds, on kvm, on my laptop)

Otherwise, static constructors in functions are never called.  This
manifested itself in the jit generating wrong code when compiling a function,
as the register calling convention was not initialized, and the jvm tried
to load all method arguments into %rax.

Not 100% it is right wrt SNaN, but it will fault if incorrect.