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dw1000.c 2.68 KiB
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#include "dw1000.h"
#include "dw1000_hal.h"
#include "deca_regs.h"

// sends a frame and blocks until finished
int dw1000_sendFrame(uint8_t *payload, uint16_t len) {

	// write tx data to data buffer
	// this buffer only contains the payload, PHR is generated by the chip
	// the chip automatically appends two FCS (CRC) bytes to this payload
	dw1000Hal_writeRegister(TX_BUFFER_ID, payload, len);

	// configure tx parameters
	uint32_t tx_fctrl_low = 0;
	uint8_t tx_fctrl_high = 0;

	// configure low 32 bits
	tx_fctrl_low |= ( (len+2) & TX_FCTRL_FLE_MASK);			// set frame length
															// this is two bytes more than the desired payload due to addition of the FCS/CRC
	tx_fctrl_low |= TX_FCTRL_TXBR_110k;						// transmit bit rate
															// transmit ranging disabled
	tx_fctrl_low |= TX_FCTRL_TXPRF_64M;						// transmit pulse repetition frequency
															// 64 MHz gives more accuracy on first path timestamp and slightly improved operating range but needs more power
	tx_fctrl_low |= TX_FCTRL_TXPSR_PE_4096;					// 4096 preamble length for maximum range
															// this also configures the PE bits
															// TXBOFFS is not used (0)

	// configure high 8 bits
															// IFSDELAY is not used


	// write to TX_FCTRL
	dw1000Hal_writeSubRegister(TX_FCTRL_ID, 0, &tx_fctrl_low, 4);
	dw1000Hal_writeSubRegister(TX_FCTRL_ID, 4, &tx_fctrl_high, 1);

	// start tx
	// set up a complete config for the register
	// the bits are cleared automatically after the transmission and need to be set up for the next transmission again!
	uint32_t sys_ctrl = 0;
	sys_ctrl |= SYS_CTRL_TRXOFF;							//  Immediately cancel all RX and TX operations, bring radio to IDLE state
	dw1000Hal_writeRegister(SYS_CTRL_ID, &sys_ctrl, 4);
	sys_ctrl = 0;

															// SFCST not set -> automatic CRC calculation
	sys_ctrl |= SYS_CTRL_TXSTRT;							// start transmission
															// TXDLYS not set -> no delayed transmission
															// CANSFCS not set (only useful when starting transmission before uploading payload)
															// TRXOFF not set (this would turn off the transmitter immediately)
	sys_ctrl |= SYS_CTRL_WAIT4RESP;							// turn on receiver after transmission to receive a response (ACK)
															// RXENAB not set (this would enter receive mode)
															// RXDLYE not set (used for delayed reception)
															// HRBPT not set (chooses receive buffer)

	// write to SYS_CTRL
	dw1000Hal_writeRegister(SYS_CTRL_ID, &sys_ctrl, 4);

	// wait for completion
	// read SYS_STATUS
	// check for TXFRS bit set
	uint32_t sys_status = 0;

	//do {
	//	dw1000Hal_readRegister(SYS_STATUS_ID, &sys_status, 4);
	//} while (!(sys_status & SYS_STATUS_TXFRS));