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Commit f656a31e authored by Vincent Dupont's avatar Vincent Dupont
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cpu/cortexm_common: use linker variable to initialize SCB->VTOR

parent 1b2b5d9d
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......@@ -26,6 +26,11 @@
*/
#define FULL_FPU_ACCESS (0x00f00000)
/**
* Interrupt vector base address, defined by the linker
*/
extern const void *_isr_vectors;
void cortexm_init(void)
{
/* initialize the FPU on Cortex-M4F CPUs */
......@@ -37,7 +42,7 @@ void cortexm_init(void)
/* configure the vector table location to internal flash */
#if defined(CPU_ARCH_CORTEX_M3) || defined(CPU_ARCH_CORTEX_M4) || \
defined(CPU_ARCH_CORTEX_M4F)
SCB->VTOR = CPU_FLASH_BASE;
SCB->VTOR = (uint32_t)&_isr_vectors;
#endif
/* initialize the interrupt priorities */
......
......@@ -41,6 +41,7 @@ SECTIONS
{
. = ALIGN(4);
_sfixed = .;
_isr_vectors = DEFINED(_isr_vectors) ? _isr_vectors : . ;
KEEP(*(.vectors .vectors.*))
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
......
......@@ -25,7 +25,7 @@ SECTIONS
/* Interrupt vectors 0x00-0x3ff. */
.vector_table :
{
_vector_rom = .;
_isr_vectors = .;
KEEP(*(.vector_table))
} > vectors
ASSERT (SIZEOF(.vector_table) == 0x400, "Interrupt vector table of invalid size.")
......
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